mirror of
https://github.com/YuzuZensai/MCUFRIEND_kbv.git
synced 2026-01-06 04:32:38 +00:00
add pinouts for Nucleo-144
This commit is contained in:
@@ -21,6 +21,10 @@
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|| defined(TARGET_NUCLEO_L476RG) \
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)
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#define ISTARGET_NUCLEO144 (0 \
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|| defined(TARGET_NUCLEO_F767ZI) \
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)
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//#warning Using pin_SHIELD_1.h
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#if 0
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@@ -192,6 +196,62 @@
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#define PIN_OUTPUT(port, pin) {if (pin > 7) PIN_MODE4((port)->CRH, (pin&7), 0x3); else PIN_MODE4((port)->CRL, pin, 0x3); } //50MHz push-pull only 0-7
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#define PIN_INPUT(port, pin) {if (pin > 7) PIN_MODE4((port)->CRH, (pin&7), 0x4); else PIN_MODE4((port)->CRL, pin, 0x4); } //input
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#elif defined(NUCLEO144) || ISTARGET_NUCLEO144
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#define PIN_MODE2(reg, pin, mode) reg=(reg&~(0x3<<((pin)<<1)))|(mode<<((pin)<<1))
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#if __MBED__
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#warning MBED knows everything
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#elif defined(STM32F767xx)
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#include <STM32F7XX.h>
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#endif
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#define D0_PORT GPIOG
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#define D0_PIN 9
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#define D1_PORT GPIOG
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#define D1_PIN 14
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#define D2_PORT GPIOF
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#define D2_PIN 15
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#define D3_PORT GPIOE
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#define D3_PIN 13
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#define D4_PORT GPIOF
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#define D4_PIN 14
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#define D5_PORT GPIOE
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#define D5_PIN 11
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#define D6_PORT GPIOE
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#define D6_PIN 9
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#define D7_PORT GPIOF
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#define D7_PIN 13
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#define D8_PORT GPIOF
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#define D8_PIN 12
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#define D9_PORT GPIOD
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#define D9_PIN 15
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#define D10_PORT GPIOD
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#define D10_PIN 14
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#define D11_PORT GPIOA
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#define D11_PIN 7
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#define D12_PORT GPIOA
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#define D12_PIN 6
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#define D13_PORT GPIOA
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#define D13_PIN 5
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#define A0_PORT GPIOA
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#define A0_PIN 3
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#define A1_PORT GPIOC
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#define A1_PIN 0
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#define A2_PORT GPIOC
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#define A2_PIN 3
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#define A3_PORT GPIOF
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#define A3_PIN 3
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#define A4_PORT GPIOF
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#define A4_PIN 5
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#define A5_PORT GPIOF
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#define A5_PIN 10
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// Shield Control macros
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#define PIN_LOW(port, pin) (port)->BSRR = (1<<((pin)+16))
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#define PIN_HIGH(port, pin) (port)->BSRR = (1<<(pin))
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//#define PIN_LOW(port, pin) (port)->ODR &= ~(1<<(pin))
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//#define PIN_HIGH(port, pin) (port)->ODR |= (1<<(pin))
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#define PIN_READ(port, pin) (port)->IDR & (1<<(pin))
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#define PIN_OUTPUT(port, pin) PIN_MODE2((port)->MODER, pin, 0x1)
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#define PIN_INPUT(port, pin) PIN_MODE2((port)->MODER, pin, 0x0) //.kbv check this
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#elif defined(NUCLEO) || ISTARGET_NUCLEO64
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#define PIN_MODE2(reg, pin, mode) reg=(reg&~(0x3<<((pin)<<1)))|(mode<<((pin)<<1))
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@@ -22,6 +22,10 @@
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|| defined(TARGET_NUCLEO_L476RG) \
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)
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#define ISTARGET_NUCLEO144 (0 \
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|| defined(TARGET_NUCLEO_F767ZI) \
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)
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//#warning Using pin_SHIELD_8.h
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#if 0
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@@ -94,6 +98,49 @@
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#define setWriteDir() {GP_OUT(GPIOA, CRH, 0xFFF); GP_OUT(GPIOA, CRL, 0xFF); GP_OUT(GPIOB, CRL, 0xFFF00000); }
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#define setReadDir() {GP_INP(GPIOA, CRH, 0xFFF); GP_INP(GPIOA, CRL, 0xFF); GP_INP(GPIOB, CRL, 0xFFF00000); }
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#elif defined(NUCLEO144) || ISTARGET_NUCLEO144
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#if __MBED__
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#warning MBED knows everything
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#elif defined(STM32F767xx)
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#include <STM32F7XX.h>
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#endif
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#define REGS(x) x
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// configure macros for the data pins
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#define DMASK ((1<<15)) //#1
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#define EMASK ((1<<13)|(1<<11)|(1<<9)) //#3, #5, #6
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#define FMASK ((1<<12)|(1<<15)|(1<<14)|(1<<13)) //#0, #2, #4, #7
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#define write_8(d) { \
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GPIOD->REGS(BSRR) = DMASK << 16; \
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GPIOE->REGS(BSRR) = EMASK << 16; \
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GPIOF->REGS(BSRR) = FMASK << 16; \
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GPIOD->REGS(BSRR) = ( ((d) & (1<<1)) << 14); \
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GPIOE->REGS(BSRR) = ( ((d) & (1<<3)) << 10) \
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| (((d) & (1<<5)) << 6) \
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| (((d) & (1<<6)) << 3); \
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GPIOF->REGS(BSRR) = ( ((d) & (1<<0)) << 12) \
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| (((d) & (1<<2)) << 13) \
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| (((d) & (1<<4)) << 10) \
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| (((d) & (1<<7)) << 6); \
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}
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#define read_8() ( ( ( (GPIOF->REGS(IDR) & (1<<12)) >> 12) \
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| ((GPIOD->REGS(IDR) & (1<<15)) >> 14) \
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| ((GPIOF->REGS(IDR) & (1<<15)) >> 13) \
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| ((GPIOE->REGS(IDR) & (1<<13)) >> 10) \
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| ((GPIOF->REGS(IDR) & (1<<14)) >> 10) \
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| ((GPIOE->REGS(IDR) & (1<<11)) >> 6) \
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| ((GPIOE->REGS(IDR) & (1<<9)) >> 3) \
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| ((GPIOF->REGS(IDR) & (1<<13)) >> 6)))
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// PD15 PE13,PE11,PE9 PF15,PF14,PF13,PF12
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#define setWriteDir() { setReadDir(); \
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GPIOD->MODER |= 0x40000000; GPIOE->MODER |= 0x04440000; GPIOF->MODER |= 0x55000000; }
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#define setReadDir() { GPIOD->MODER &= ~0xC0000000; GPIOE->MODER &= ~0x0CCC0000; GPIOF->MODER &= ~0xFF000000; }
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#elif defined(NUCLEO) || ISTARGET_NUCLEO64
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#if __MBED__
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#warning MBED knows everything
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