mirror of
https://github.com/YuzuZensai/MCUFRIEND_kbv.git
synced 2026-01-06 04:32:38 +00:00
tidy up STM32F103, conditional GPIO_INIT macro
This commit is contained in:
@@ -75,6 +75,7 @@
|
||||
#define PIN_HIGH(p, b) (p) |= (1<<(b))
|
||||
#define PIN_OUTPUT(p, b) *(&p-1) |= (1<<(b))
|
||||
|
||||
//################################# ZERO and M0_PRO ############################
|
||||
#elif defined(__SAMD21G18A__) //regular UNO shield on ZERO or M0_PRO
|
||||
#include "sam.h"
|
||||
// configure macros for the control pins
|
||||
@@ -131,6 +132,7 @@
|
||||
#define PIN_HIGH(port, pin) (port).OUTSET.reg = (1<<(pin))
|
||||
#define PIN_OUTPUT(port, pin) (port).DIR.reg |= (1<<(pin))
|
||||
|
||||
//####################################### DUE ############################
|
||||
#elif defined(__SAM3X8E__) //regular UNO shield on DUE
|
||||
// configure macros for the control pins
|
||||
#define RD_PORT PIOA
|
||||
@@ -232,12 +234,13 @@ void write_8(uint8_t x)
|
||||
#define PIN_HIGH(p, b) (p) |= (1<<(b))
|
||||
#define PIN_OUTPUT(p, b) *(&p-1) |= (1<<(b))
|
||||
|
||||
//####################################### TEENSY ############################
|
||||
#elif defined(__MK20DX128__) || defined(__MK20DX256__) || defined(__MK64FX512__) || defined(__MK66FX1M0__) // regular UNO shield on a Teensy 3.x
|
||||
#warning regular UNO shield on a Teensy 3.x
|
||||
|
||||
#if defined(__MK20DX128__) || defined(__MK20DX256__) // Teensy3.0 || 3.2 96MHz
|
||||
#define WRITE_DELAY { WR_ACTIVE; WR_ACTIVE; }
|
||||
#define READ_DELAY { RD_ACTIVE; RD_ACTIVE; RD_ACTIVE; RD_ACTIVE; RD_ACTIVE; }
|
||||
#define READ_DELAY { RD_ACTIVE; RD_ACTIVE; RD_ACTIVE; RD_ACTIVE; RD_ACTIVE; RD_ACTIVE; }
|
||||
#elif defined(__MK64FX512__) // Teensy3.5 120MHz thanks to PeteJohno
|
||||
#define WRITE_DELAY { WR_ACTIVE; WR_ACTIVE; WR_ACTIVE; WR_ACTIVE; }
|
||||
#define READ_DELAY { RD_ACTIVE; RD_ACTIVE; RD_ACTIVE; RD_ACTIVE; RD_ACTIVE; RD_ACTIVE; RD_ACTIVE; RD_ACTIVE; }
|
||||
@@ -289,6 +292,8 @@ void write_8(uint8_t x)
|
||||
#define write16(x) { uint8_t h = (x)>>8, l = x; write8(h); write8(l); }
|
||||
#define READ_8(dst) { RD_STROBE; READ_DELAY; dst = read_8(); RD_IDLE; } //PJ adjusted
|
||||
#define READ_16(dst) { uint8_t hi; READ_8(hi); READ_8(dst); dst |= (hi << 8); }
|
||||
//#define GPIO_INIT() {SIM_SCGC5 |= 0x3E00;} //PORTA-PORTE
|
||||
#define GPIO_INIT() {for (int i = 2; i <= 9; i++) pinMode(i, OUTPUT); for (int i = A0; i <= A4; i++) pinMode(i, OUTPUT);}
|
||||
|
||||
#define PASTE(x, y) x ## y
|
||||
|
||||
@@ -296,148 +301,31 @@ void write_8(uint8_t x)
|
||||
#define PIN_HIGH(port, pin) PASTE(port, _PSOR) = (1<<(pin))
|
||||
#define PIN_OUTPUT(port, pin) PASTE(port, _PDDR) |= (1<<(pin))
|
||||
|
||||
#elif defined(__STM32F1__) && defined(ARDUINO_STM_NUCLEO_F103RB) // Uno Shield on NUCLEO-F103
|
||||
#warning Uno Shield on NUCLEO-F103 REGS
|
||||
// be wise to clear all four mode bits properly.
|
||||
#define GROUP_MODE(port, reg, mask, val) {port->regs->reg = (port->regs->reg & ~(mask)) | ((mask)&(val)); }
|
||||
#define GP_OUT(port, reg, mask) GROUP_MODE(port, reg, mask, 0x33333333)
|
||||
#define GP_INP(port, reg, mask) GROUP_MODE(port, reg, mask, 0x44444444)
|
||||
|
||||
#define RD_PORT GPIOA
|
||||
#define RD_PIN 0
|
||||
#define WR_PORT GPIOA
|
||||
#define WR_PIN 1
|
||||
#define CD_PORT GPIOA
|
||||
#define CD_PIN 4
|
||||
#define CS_PORT GPIOB
|
||||
#define CS_PIN 0
|
||||
#define RESET_PORT GPIOC
|
||||
#define RESET_PIN 1
|
||||
|
||||
// configure macros for the data pins
|
||||
#define write_8(d) { \
|
||||
GPIOA->regs->BSRR = 0x0700 << 16; \
|
||||
GPIOB->regs->BSRR = 0x0438 << 16; \
|
||||
GPIOC->regs->BSRR = 0x0080 << 16; \
|
||||
GPIOA->regs->BSRR = (((d) & (1<<0)) << 9) \
|
||||
| (((d) & (1<<2)) << 8) \
|
||||
| (((d) & (1<<7)) << 1); \
|
||||
GPIOB->regs->BSRR = (((d) & (1<<3)) << 0) \
|
||||
| (((d) & (1<<4)) << 1) \
|
||||
| (((d) & (1<<5)) >> 1) \
|
||||
| (((d) & (1<<6)) << 4); \
|
||||
GPIOC->regs->BSRR = (((d) & (1<<1)) << 6); \
|
||||
}
|
||||
|
||||
#define read_8() ( (((GPIOA->regs->IDR & (1<<9)) >> 9) \
|
||||
| ((GPIOC->regs->IDR & (1<<7)) >> 6) \
|
||||
| ((GPIOA->regs->IDR & (1<<10)) >> 8) \
|
||||
| ((GPIOB->regs->IDR & (1<<3)) >> 0) \
|
||||
| ((GPIOB->regs->IDR & (1<<5)) >> 1) \
|
||||
| ((GPIOB->regs->IDR & (1<<4)) << 1) \
|
||||
| ((GPIOB->regs->IDR & (1<<10)) >> 4) \
|
||||
| ((GPIOA->regs->IDR & (1<<8)) >> 1)))
|
||||
|
||||
// PA10,PA9,PA8 PB10 PB5,PB4,PB3 PC7
|
||||
#define setWriteDir() {GP_OUT(GPIOA, CRH, 0xFFF); GP_OUT(GPIOB, CRH, 0xF00); GP_OUT(GPIOB, CRL, 0xFFF000); GP_OUT(GPIOC, CRL, 0xF0000000); }
|
||||
#define setReadDir() {GP_INP(GPIOA, CRH, 0xFFF); GP_INP(GPIOB, CRH, 0xF00); GP_INP(GPIOB, CRL, 0xFFF000); GP_INP(GPIOC, CRL, 0xF0000000); }
|
||||
|
||||
#define write8(x) { write_8(x); WR_ACTIVE; WR_STROBE; }
|
||||
#define write16(x) { uint8_t h = (x)>>8, l = x; write8(h); write8(l); }
|
||||
#define READ_8(dst) { RD_STROBE; RD_ACTIVE; RD_ACTIVE; RD_ACTIVE; RD_ACTIVE; RD_ACTIVE; dst = read_8(); RD_IDLE; }
|
||||
#define READ_16(dst) { uint8_t hi; READ_8(hi); READ_8(dst); dst |= (hi << 8); }
|
||||
|
||||
#define PIN_HIGH(port, pin) (port)->regs->BSRR = (1<<(pin))
|
||||
//#define PIN_LOW(port, pin) (port)->regs->BSRR = (1<<((pin)+16))
|
||||
#define PIN_LOW(port, pin) (port)->regs->ODR &= ~(1<<(pin))
|
||||
#if 0
|
||||
#define PIN_OUTPUT(port, pin) { \
|
||||
if (pin < 8) { GP_OUT(port, CRL, 0xF<<((pin)<<2)); } \
|
||||
else { GP_OUT(port, CRH, 0xF<<((pin-8)<<2)); } \
|
||||
}
|
||||
#define PIN_INPUT(port, pin) { \
|
||||
if (pin < 8) { GP_INP(port, CRL, 0xF<<((pin)<<2)); } \
|
||||
else { GP_INP(port, CRH, 0xF<<((pin-8)<<2)); } \
|
||||
}
|
||||
#elif 1
|
||||
#define PIN_OUTPUT(port, pin) gpio_set_mode(port, pin, GPIO_OUTPUT_PP) //50MHz push-pull only 0-7
|
||||
#define PIN_INPUT(port, pin) gpio_set_mode(port, pin, GPIO_INPUT_FLOATING) //digital input
|
||||
#else
|
||||
#define PIN_OUTPUT(port, pin) GP_OUT(port, CRL, 0xF<<((pin)<<2)) //50MHz push-pull only 0-7
|
||||
#define PIN_INPUT(port, pin) GP_INP(port, CRL, 0xF<<((pin)<<2)) //digital input
|
||||
//####################################### STM32 ############################
|
||||
#elif defined(__STM32F1__) || defined(STM32F103xB) // MAPLECORE or STM32CORE
|
||||
#if defined(ARDUINO_NUCLEO_F103C8) || defined(ARDUINO_NUCLEO_F103RB) //regular CMSIS libraries
|
||||
#define REGS(x) x
|
||||
#define GPIO_INIT() { RCC->APB2ENR |= RCC_APB2ENR_IOPAEN | RCC_APB2ENR_IOPBEN | RCC_APB2ENR_IOPCEN | RCC_APB2ENR_IOPDEN | RCC_APB2ENR_AFIOEN; \
|
||||
AFIO->MAPR |= AFIO_MAPR_SWJ_CFG_1;}
|
||||
#else //weird Maple libraries
|
||||
#define REGS(x) regs->x
|
||||
#endif
|
||||
|
||||
//#elif defined(__STM32F1__) && defined(ARDUINO_GENERIC_STM32F103R)
|
||||
#elif defined(__STM32F1__) && defined(ARDUINO_MAPLE_REV3) // Uno Shield on MAPLE_REV3 board
|
||||
#warning Uno Shield on MAPLE_REV3 board
|
||||
// be wise to clear all four mode bits properly.
|
||||
#define GROUP_MODE(port, reg, mask, val) {port->regs->reg = (port->regs->reg & ~(mask)) | ((mask)&(val)); }
|
||||
#define GROUP_MODE(port, reg, mask, val) {port->REGS(reg) = (port->REGS(reg) & ~(mask)) | ((mask)&(val)); }
|
||||
#define PIN_HIGH(port, pin) (port)-> REGS(BSRR) = (1<<(pin))
|
||||
#define PIN_LOW(port, pin) (port)-> REGS(BSRR) = (1<<((pin)+16))
|
||||
#define GP_OUT(port, reg, mask) GROUP_MODE(port, reg, mask, 0x33333333)
|
||||
#define GP_INP(port, reg, mask) GROUP_MODE(port, reg, mask, 0x44444444)
|
||||
|
||||
#define RD_PORT GPIOC
|
||||
#define RD_PIN 0
|
||||
#define WR_PORT GPIOC
|
||||
#define WR_PIN 1
|
||||
#define CD_PORT GPIOC
|
||||
#define CD_PIN 2
|
||||
#define CS_PORT GPIOC
|
||||
#define CS_PIN 3
|
||||
#define RESET_PORT GPIOC
|
||||
#define RESET_PIN 4
|
||||
|
||||
// configure macros for the data pins
|
||||
#define write_8(d) { \
|
||||
GPIOA->regs->BSRR = 0x0703 << 16; \
|
||||
GPIOB->regs->BSRR = 0x00E0 << 16; \
|
||||
GPIOA->regs->BSRR = (((d) & (1<<0)) << 10) \
|
||||
| (((d) & (1<<2)) >> 2) \
|
||||
| (((d) & (1<<3)) >> 2) \
|
||||
| (((d) & (1<<6)) << 2) \
|
||||
| (((d) & (1<<7)) << 2); \
|
||||
GPIOB->regs->BSRR = (((d) & (1<<1)) << 6) \
|
||||
| (((d) & (1<<4)) << 1) \
|
||||
| (((d) & (1<<5)) << 1); \
|
||||
#define PIN_OUTPUT(port, pin) {\
|
||||
if (pin < 8) {GP_OUT(port, CRL, 0xF<<((pin)<<2));} \
|
||||
else {GP_OUT(port, CRH, 0xF<<((pin&7)<<2));} \
|
||||
}
|
||||
#define PIN_INPUT(port, pin) { \
|
||||
if (pin < 8) { GP_INP(port, CRL, 0xF<<((pin)<<2)); } \
|
||||
else { GP_INP(port, CRH, 0xF<<((pin&7)<<2)); } \
|
||||
}
|
||||
|
||||
#define read_8() ( (((GPIOA->regs->IDR & (1<<10)) >> 10) \
|
||||
| ((GPIOB->regs->IDR & (1<<7)) >> 6) \
|
||||
| ((GPIOA->regs->IDR & (1<<0)) << 2) \
|
||||
| ((GPIOA->regs->IDR & (1<<1)) << 2) \
|
||||
| ((GPIOB->regs->IDR & (1<<5)) >> 1) \
|
||||
| ((GPIOB->regs->IDR & (1<<6)) >> 1) \
|
||||
| ((GPIOA->regs->IDR & (1<<8)) >> 2) \
|
||||
| ((GPIOA->regs->IDR & (1<<9)) >> 2)))
|
||||
|
||||
// PA10,PA9,PA8 PA1,PA0 PB7,PB6,PB5
|
||||
#define setWriteDir() {GP_OUT(GPIOA, CRH, 0xFFF); GP_OUT(GPIOA, CRL, 0xFF); GP_OUT(GPIOB, CRL, 0xFFF00000); }
|
||||
#define setReadDir() {GP_INP(GPIOA, CRH, 0xFFF); GP_INP(GPIOA, CRL, 0xFF); GP_INP(GPIOB, CRL, 0xFFF00000); }
|
||||
|
||||
// MANOLO8888's wiring scheme is far simpler:
|
||||
//#define write_8(d) { GPIOA->regs->BSRR = 0x00FF << 16; GPIOA->regs->BSRR = (d) & 0xFF; }
|
||||
//#define read_8() (GPIOA->regs->IDR & 0xFF)
|
||||
// PA7 ..PA0
|
||||
//#define setWriteDir() {GP_OUT(GPIOA, CRL, 0xFFFFFFFF); }
|
||||
//#define setReadDir() {GP_INP(GPIOA, CRL, 0xFFFFFFFF); }
|
||||
|
||||
#define write8(x) { write_8(x); WR_ACTIVE; WR_STROBE; }
|
||||
#define write16(x) { uint8_t h = (x)>>8, l = x; write8(h); write8(l); }
|
||||
#define READ_8(dst) { RD_STROBE; RD_ACTIVE; RD_ACTIVE; RD_ACTIVE; RD_ACTIVE; RD_ACTIVE; dst = read_8(); RD_IDLE; }
|
||||
#define READ_16(dst) { uint8_t hi; READ_8(hi); READ_8(dst); dst |= (hi << 8); }
|
||||
|
||||
#define PIN_HIGH(port, pin) (port)->regs->BSRR = (1<<(pin))
|
||||
//#define PIN_LOW(port, pin) (port)->regs->BSRR = (1<<((pin)+16))
|
||||
#define PIN_LOW(port, pin) (port)->regs->ODR &= ~(1<<(pin))
|
||||
#define PIN_OUTPUT(port, pin) GP_OUT(port, CRL, 0xF<<((pin)<<2)) //50MHz push-pull only 0-7
|
||||
#define PIN_INPUT(port, pin) GP_INP(port, CRL, 0xF<<((pin)<<2)) //digital input
|
||||
|
||||
#elif defined(__STM32F1__) && defined(ARDUINO_GENERIC_STM32F103C) // Uno Shield on BLUEPILL_ADAPTER
|
||||
#warning Uno Shield on BLUEPILL_ADAPTER
|
||||
// be wise to clear all four mode bits properly.
|
||||
#define GROUP_MODE(port, reg, mask, val) {port->regs->reg = (port->regs->reg & ~(mask)) | ((mask)&(val)); }
|
||||
#define GP_OUT(port, reg, mask) GROUP_MODE(port, reg, mask, 0x33333333)
|
||||
#define GP_INP(port, reg, mask) GROUP_MODE(port, reg, mask, 0x44444444)
|
||||
|
||||
#if defined(ARDUINO_GENERIC_STM32F103C) || defined(ARDUINO_NUCLEO_F103C8)
|
||||
#warning Uno Shield on BLUEPILL
|
||||
#define RD_PORT GPIOB
|
||||
#define RD_PIN 5
|
||||
#define WR_PORT GPIOB
|
||||
@@ -450,24 +338,102 @@ void write_8(uint8_t x)
|
||||
#define RESET_PIN 9
|
||||
|
||||
// configure macros for the data pins
|
||||
// MANOLO8888's wiring scheme is far simpler:
|
||||
#define write_8(d) { GPIOA->regs->BSRR = 0x00FF << 16; GPIOA->regs->BSRR = (d) & 0xFF; }
|
||||
#define read_8() (GPIOA->regs->IDR & 0xFF)
|
||||
#define write_8(d) { GPIOA->REGS(BSRR) = 0x00FF << 16; GPIOA->REGS(BSRR) = (d) & 0xFF; }
|
||||
#define read_8() (GPIOA->REGS(IDR) & 0xFF)
|
||||
// PA7 ..PA0
|
||||
#define setWriteDir() {GP_OUT(GPIOA, CRL, 0xFFFFFFFF); }
|
||||
#define setReadDir() {GP_INP(GPIOA, CRL, 0xFFFFFFFF); }
|
||||
|
||||
#elif defined(ARDUINO_STM_NUCLEO_F103RB) || defined(ARDUINO_NUCLEO_F103RB) // Uno Shield on NUCLEO-F103
|
||||
#warning Uno Shield on NUCLEO-F103
|
||||
#define RD_PORT GPIOA
|
||||
#define RD_PIN 0
|
||||
#define WR_PORT GPIOA
|
||||
#define WR_PIN 1
|
||||
#define CD_PORT GPIOA
|
||||
#define CD_PIN 4
|
||||
#define CS_PORT GPIOB
|
||||
#define CS_PIN 0
|
||||
#define RESET_PORT GPIOC
|
||||
#define RESET_PIN 1
|
||||
|
||||
// configure macros for the data pins
|
||||
#define write_8(d) { \
|
||||
GPIOA->REGS(BSRR) = 0x0700 << 16; \
|
||||
GPIOB->REGS(BSRR) = 0x0438 << 16; \
|
||||
GPIOC->REGS(BSRR) = 0x0080 << 16; \
|
||||
GPIOA->REGS(BSRR) = ( ((d) & (1<<0)) << 9) \
|
||||
| (((d) & (1<<2)) << 8) \
|
||||
| (((d) & (1<<7)) << 1); \
|
||||
GPIOB->REGS(BSRR) = ( ((d) & (1<<3)) << 0) \
|
||||
| (((d) & (1<<4)) << 1) \
|
||||
| (((d) & (1<<5)) >> 1) \
|
||||
| (((d) & (1<<6)) << 4); \
|
||||
GPIOC->REGS(BSRR) = ( ((d) & (1<<1)) << 6); \
|
||||
}
|
||||
|
||||
#define read_8() ( ( ( (GPIOA->REGS(IDR) & (1<<9)) >> 9) \
|
||||
| ((GPIOC->REGS(IDR) & (1<<7)) >> 6) \
|
||||
| ((GPIOA->REGS(IDR) & (1<<10)) >> 8) \
|
||||
| ((GPIOB->REGS(IDR) & (1<<3)) >> 0) \
|
||||
| ((GPIOB->REGS(IDR) & (1<<5)) >> 1) \
|
||||
| ((GPIOB->REGS(IDR) & (1<<4)) << 1) \
|
||||
| ((GPIOB->REGS(IDR) & (1<<10)) >> 4) \
|
||||
| ((GPIOA->REGS(IDR) & (1<<8)) >> 1)))
|
||||
|
||||
// PA10,PA9,PA8 PB10 PB5,PB4,PB3 PC7
|
||||
#define setWriteDir() {GP_OUT(GPIOA, CRH, 0xFFF); GP_OUT(GPIOB, CRH, 0xF00); GP_OUT(GPIOB, CRL, 0xFFF000); GP_OUT(GPIOC, CRL, 0xF0000000); }
|
||||
#define setReadDir() {GP_INP(GPIOA, CRH, 0xFFF); GP_INP(GPIOB, CRH, 0xF00); GP_INP(GPIOB, CRL, 0xFFF000); GP_INP(GPIOC, CRL, 0xF0000000); }
|
||||
|
||||
#elif defined(ARDUINO_MAPLE_REV3) // Uno Shield on MAPLE_REV3 board
|
||||
#warning Uno Shield on MAPLE_REV3 board
|
||||
#define RD_PORT GPIOC
|
||||
#define RD_PIN 0
|
||||
#define WR_PORT GPIOC
|
||||
#define WR_PIN 1
|
||||
#define CD_PORT GPIOC
|
||||
#define CD_PIN 2
|
||||
#define CS_PORT GPIOC
|
||||
#define CS_PIN 3
|
||||
#define RESET_PORT GPIOC
|
||||
#define RESET_PIN 4
|
||||
|
||||
// configure macros for the data pins
|
||||
#define write_8(d) { \
|
||||
GPIOA->REGS(BSRR) = 0x0703 << 16; \
|
||||
GPIOB->REGS(BSRR) = 0x00E0 << 16; \
|
||||
GPIOA->REGS(BSRR) = ( ((d) & (1<<0)) << 10) \
|
||||
| (((d) & (1<<2)) >> 2) \
|
||||
| (((d) & (1<<3)) >> 2) \
|
||||
| (((d) & (1<<6)) << 2) \
|
||||
| (((d) & (1<<7)) << 2); \
|
||||
GPIOB->REGS(BSRR) = ( ((d) & (1<<1)) << 6) \
|
||||
| (((d) & (1<<4)) << 1) \
|
||||
| (((d) & (1<<5)) << 1); \
|
||||
}
|
||||
|
||||
#define read_8() ( ( ( (GPIOA->REGS(IDR) & (1<<10)) >> 10) \
|
||||
| ((GPIOB->REGS(IDR) & (1<<7)) >> 6) \
|
||||
| ((GPIOA->REGS(IDR) & (1<<0)) << 2) \
|
||||
| ((GPIOA->REGS(IDR) & (1<<1)) << 2) \
|
||||
| ((GPIOB->REGS(IDR) & (1<<5)) >> 1) \
|
||||
| ((GPIOB->REGS(IDR) & (1<<6)) >> 1) \
|
||||
| ((GPIOA->REGS(IDR) & (1<<8)) >> 2) \
|
||||
| ((GPIOA->REGS(IDR) & (1<<9)) >> 2)))
|
||||
|
||||
// PA10,PA9,PA8 PA1,PA0 PB7,PB6,PB5
|
||||
#define setWriteDir() {GP_OUT(GPIOA, CRH, 0xFFF); GP_OUT(GPIOA, CRL, 0xFF); GP_OUT(GPIOB, CRL, 0xFFF00000); }
|
||||
#define setReadDir() {GP_INP(GPIOA, CRH, 0xFFF); GP_INP(GPIOA, CRL, 0xFF); GP_INP(GPIOB, CRL, 0xFFF00000); }
|
||||
|
||||
#else
|
||||
#error REGS group
|
||||
#endif
|
||||
|
||||
#define write8(x) { write_8(x); WR_ACTIVE; WR_STROBE; }
|
||||
#define write16(x) { uint8_t h = (x)>>8, l = x; write8(h); write8(l); }
|
||||
#define READ_8(dst) { RD_STROBE; RD_ACTIVE; RD_ACTIVE; RD_ACTIVE; RD_ACTIVE; RD_ACTIVE; dst = read_8(); RD_IDLE; }
|
||||
#define READ_16(dst) { uint8_t hi; READ_8(hi); READ_8(dst); dst |= (hi << 8); }
|
||||
|
||||
#define PIN_HIGH(port, pin) (port)->regs->BSRR = (1<<(pin))
|
||||
#define PIN_LOW(port, pin) (port)->regs->BSRR = (1<<((pin)+16))
|
||||
//#define PIN_LOW(port, pin) (port)->regs->ODR &= ~(1<<(pin))
|
||||
#define PIN_OUTPUT(port, pin) gpio_set_mode(port, pin, GPIO_OUTPUT_PP) //50MHz push-pull on 0-15
|
||||
#define PIN_INPUT(port, pin) gpio_set_mode(port, pin, GPIO_INPUT_FLOATING) //digital input
|
||||
|
||||
#else
|
||||
#error MCU unsupported
|
||||
#endif // regular UNO shields on Arduino boards
|
||||
@@ -494,14 +460,9 @@ void write_8(uint8_t x)
|
||||
#define WR_STROBE { WR_ACTIVE; WR_IDLE; } //PWLW=TWRL=50ns
|
||||
#define RD_STROBE RD_IDLE, RD_ACTIVE, RD_ACTIVE, RD_ACTIVE //PWLR=TRDL=150ns, tDDR=100ns
|
||||
|
||||
#if defined(TEENSYDUINO)
|
||||
#warning special pinMode() initialisation for TEENSYDUINO
|
||||
#define CTL_INIT() { \
|
||||
for (int i = 2; i <= 9; i++) pinMode(i, OUTPUT); \
|
||||
for (int i = A0; i <= A4; i++) pinMode(i, OUTPUT); \
|
||||
RD_OUTPUT; WR_OUTPUT; CD_OUTPUT; CS_OUTPUT; RESET_OUTPUT; }
|
||||
#else
|
||||
#define CTL_INIT() { RD_OUTPUT; WR_OUTPUT; CD_OUTPUT; CS_OUTPUT; RESET_OUTPUT; }
|
||||
#if !defined(GPIO_INIT)
|
||||
#define GPIO_INIT()
|
||||
#endif
|
||||
#define CTL_INIT() { GPIO_INIT(); RD_OUTPUT; WR_OUTPUT; CD_OUTPUT; CS_OUTPUT; RESET_OUTPUT; }
|
||||
#define WriteCmd(x) { CD_COMMAND; write16(x); }
|
||||
#define WriteData(x) { CD_DATA; write16(x); }
|
||||
|
||||
Reference in New Issue
Block a user