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add pins for ITEADMAPLE

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prenticedavid
2017-03-27 16:34:21 +01:00
parent b6f787c64d
commit 44b042ac7e
2 changed files with 100 additions and 12 deletions
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73
utility/pin_shield_1.h
View File

@@ -10,10 +10,10 @@
#define LPC1768 1768
#define LPC2103 2103
#define LPC2148 2148
#warning Using pin_SHIELD_1.h
//#warning Using pin_SHIELD_1.h
#if 0
#elif defined(STM32F103x8)
#elif defined(BLUEPILL)
#define PIN_MODE2(reg, pin, mode) reg=(reg&~(0x3<<((pin)<<1)))|(mode<<((pin)<<1))
#if defined(__CC_ARM)
#include <STM32F10X.h>
@@ -21,9 +21,9 @@
#include <STM32F1XX.h>
#endif
#define D0_PORT GPIOA
#define D0_PIN 3
#define D0_PIN 10
#define D1_PORT GPIOA
#define D1_PIN 2
#define D1_PIN 9
#define D2_PORT GPIOA
#define D2_PIN 2
#define D3_PORT GPIOA
@@ -38,7 +38,7 @@
#define D7_PIN 7
#define D8_PORT GPIOA
#define D8_PIN 0
#define D9_PORT GPIOC
#define D9_PORT GPIOA
#define D9_PIN 1
#define D10_PORT GPIOA
#define D10_PIN 15
@@ -63,13 +63,66 @@
// Shield Control macros
#define PIN_LOW(port, pin) (port)->BSRR = (1<<((pin)+16))
#define PIN_HIGH(port, pin) (port)->BSRR = (1<<(pin))
//#define PIN_LOW(port, pin) (port)->ODR &= ~(1<<(pin))
//#define PIN_HIGH(port, pin) (port)->ODR |= (1<<(pin))
#define PIN_READ(port, pin) (port)->IDR & (1<<(pin))
#warning STM32F103x8 ******************************
#define PIN_MODE4(reg, pin, mode) reg=(reg&~(0xF<<((pin)<<2)))|(mode<<((pin)<<2))
#define PIN_OUTPUT(port, pin) PIN_MODE4((port)->CRL, pin, 0x3) //50MHz push-pull only 0-7
#define PIN_INPUT(port, pin) PIN_MODE4((port)->CRL, pin, 0x4) //digital input
#define PIN_OUTPUT(port, pin) {if (pin > 7) PIN_MODE4((port)->CRH, (pin&7), 0x3); else PIN_MODE4((port)->CRL, pin, 0x3); } //50MHz push-pull only 0-7
#define PIN_INPUT(port, pin) {if (pin > 7) PIN_MODE4((port)->CRH, (pin&7), 0x4); else PIN_MODE4((port)->CRL, pin, 0x4); } //input
#elif defined(ITEADMAPLE)
#define PIN_MODE2(reg, pin, mode) reg=(reg&~(0x3<<((pin)<<1)))|(mode<<((pin)<<1))
#if defined(__CC_ARM)
#include <STM32F10X.h>
#else
#include <STM32F1XX.h>
#endif
#define D0_PORT GPIOA
#define D0_PIN 3
#define D1_PORT GPIOA
#define D1_PIN 2
#define D2_PORT GPIOA
#define D2_PIN 0
#define D3_PORT GPIOA
#define D3_PIN 1
#define D4_PORT GPIOB
#define D4_PIN 5
#define D5_PORT GPIOB
#define D5_PIN 6
#define D6_PORT GPIOA
#define D6_PIN 8
#define D7_PORT GPIOA
#define D7_PIN 9
#define D8_PORT GPIOA
#define D8_PIN 10
#define D9_PORT GPIOB
#define D9_PIN 7
#define D10_PORT GPIOA
#define D10_PIN 4
#define D11_PORT GPIOA
#define D11_PIN 7
#define D12_PORT GPIOA
#define D12_PIN 6
#define D13_PORT GPIOA
#define D13_PIN 5
#define A0_PORT GPIOC
#define A0_PIN 0
#define A1_PORT GPIOC
#define A1_PIN 1
#define A2_PORT GPIOC
#define A2_PIN 2
#define A3_PORT GPIOC
#define A3_PIN 3
#define A4_PORT GPIOC
#define A4_PIN 4
#define A5_PORT GPIOC
#define A5_PIN 5
// Shield Control macros
#define PIN_LOW(port, pin) (port)->BSRR = (1<<((pin)+16))
#define PIN_HIGH(port, pin) (port)->BSRR = (1<<(pin))
#define PIN_READ(port, pin) (port)->IDR & (1<<(pin))
#define PIN_MODE4(reg, pin, mode) reg=(reg&~(0xF<<((pin)<<2)))|(mode<<((pin)<<2))
#define PIN_OUTPUT(port, pin) {if (pin > 7) PIN_MODE4((port)->CRH, (pin&7), 0x3); else PIN_MODE4((port)->CRL, pin, 0x3); } //50MHz push-pull only 0-7
#define PIN_INPUT(port, pin) {if (pin > 7) PIN_MODE4((port)->CRH, (pin&7), 0x4); else PIN_MODE4((port)->CRL, pin, 0x4); } //input
#elif defined(NUCLEO) || defined(TARGET_NUCLEO_F072RB) || defined(TARGET_NUCLEO_F401RE) || defined(TARGET_NUCLEO_F411RE) || defined(TARGET_NUCLEO_F103RB) || defined(TARGET_NUCLEO_L476RG)

39
utility/pin_shield_8.h
View File

@@ -11,11 +11,11 @@
#define LPC1768 1768
#define LPC2103 2103
#define LPC2148 2148
#warning Using pin_SHIELD_8.h
//#warning Using pin_SHIELD_8.h
#if 0
#elif defined(STM32F103x8) // Uno Shield on BLUEPILL_ADAPTER
#elif defined(BLUEPILL) // Uno Shield on BLUEPILL_ADAPTER
#warning Uno Shield on BLUEPILL_ADAPTER
// configure macros for the data pins
@@ -29,6 +29,41 @@
#define setWriteDir() {GP_OUT(GPIOA, CRL, 0xFFFFFFFF); }
#define setReadDir() {GP_INP(GPIOA, CRL, 0xFFFFFFFF); }
#elif defined(ITEADMAPLE) // Uno Shield on MAPLE_REV3 board
#warning Uno Shield on MAPLE_REV3 board
#define REGS(x) x
#define GROUP_MODE(port, reg, mask, val) {port->REGS(reg) = (port->REGS(reg) & ~(mask)) | ((mask)&(val)); }
#define GP_OUT(port, reg, mask) GROUP_MODE(port, reg, mask, 0x33333333)
#define GP_INP(port, reg, mask) GROUP_MODE(port, reg, mask, 0x44444444)
// configure macros for the data pins
#define write_8(d) { \
GPIOA->REGS(BSRR) = 0x0703 << 16; \
GPIOB->REGS(BSRR) = 0x00E0 << 16; \
GPIOA->REGS(BSRR) = ( ((d) & (1<<0)) << 10) \
| (((d) & (1<<2)) >> 2) \
| (((d) & (1<<3)) >> 2) \
| (((d) & (1<<6)) << 2) \
| (((d) & (1<<7)) << 2); \
GPIOB->REGS(BSRR) = ( ((d) & (1<<1)) << 6) \
| (((d) & (1<<4)) << 1) \
| (((d) & (1<<5)) << 1); \
}
#define read_8() ( ( ( (GPIOA->REGS(IDR) & (1<<10)) >> 10) \
| ((GPIOB->REGS(IDR) & (1<<7)) >> 6) \
| ((GPIOA->REGS(IDR) & (1<<0)) << 2) \
| ((GPIOA->REGS(IDR) & (1<<1)) << 2) \
| ((GPIOB->REGS(IDR) & (1<<5)) >> 1) \
| ((GPIOB->REGS(IDR) & (1<<6)) >> 1) \
| ((GPIOA->REGS(IDR) & (1<<8)) >> 2) \
| ((GPIOA->REGS(IDR) & (1<<9)) >> 2)))
// PA10,PA9,PA8 PA1,PA0 PB7,PB6,PB5
#define setWriteDir() {GP_OUT(GPIOA, CRH, 0xFFF); GP_OUT(GPIOA, CRL, 0xFF); GP_OUT(GPIOB, CRL, 0xFFF00000); }
#define setReadDir() {GP_INP(GPIOA, CRH, 0xFFF); GP_INP(GPIOA, CRL, 0xFF); GP_INP(GPIOB, CRL, 0xFFF00000); }
#elif defined(NUCLEO) || defined(TARGET_NUCLEO_F072RB) || defined(TARGET_NUCLEO_F401RE) || defined(TARGET_NUCLEO_F411RE) || defined(TARGET_NUCLEO_F103RB) || defined(TARGET_NUCLEO_L476RG)
#if __MBED__
#warning MBED knows everything