mirror of
https://github.com/YuzuZensai/MCUFRIEND_kbv.git
synced 2026-01-30 20:24:15 +00:00
Merge remote-tracking branch 'refs/remotes/origin/shared_MIPI_begin'
This commit is contained in:
@@ -1,24 +1,28 @@
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//#define SUPPORT_0139 //costs about 238 bytes
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//#define SUPPORT_1289 //costs about 408 bytes
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#define SUPPORT_1963 //only works with 16BIT bus anyway
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//#define SUPPORT_4532 //costs about 128 bytes. thanks Leodino
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//#define SUPPORT_4535
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#define SUPPORT_68140 //very untested
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//#define SUPPORT_8347D //costs about 472 bytes, 0.27s
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//#define SUPPORT_8347A //costs about +178 bytes on top of 8347D
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//#define SUPPORT_8352A //costs about 688 bytes, 0.27s
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#define OFFSET_9327 32 //costs about 103 bytes, 0.08s
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//#define SUPPORT_0139 //not working +238 bytes
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#define SUPPORT_0154 //S6D0154 +320 bytes
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//#define SUPPORT_1289 //costs about 408 bytes
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#define SUPPORT_1963 //only works with 16BIT bus anyway
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//#define SUPPORT_4532 //LGDP4532 +120 bytes. thanks Leodino
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#define SUPPORT_4535 //LGDP4535 +180 bytes
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#define SUPPORT_68140 //RM68140 +52 bytes defaults to PIXFMT=0x55
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#define SUPPORT_7781 //ST7781 +172 bytes
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//#define SUPPORT_8347D //HX8347-D, HX8347-G, HX8347-I +520 bytes, 0.27s
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//#define SUPPORT_8347A //HX8347-A +500 bytes, 0.27s
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//#define SUPPORT_8352A //HX8352A +486 bytes, 0.27s
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//#define SUPPORT_9326_5420 //ILI9326, SPFD5420 +246 bytes
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#define SUPPORT_B509_7793 //R61509, ST7793 +244 bytes
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#define OFFSET_9327 32 //costs about 103 bytes, 0.08s
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#include "MCUFRIEND_kbv.h"
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#if defined(USE_SERIAL)
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#include "mcufriend_serial.h"
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#include "utility/mcufriend_serial.h"
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//uint8_t running;
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#elif defined(__MBED__)
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#include "mcufriend_mbed.h"
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#include "utility/mcufriend_mbed.h"
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#elif defined(__CC_ARM)
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#include "mcufriend_keil.h"
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#include "utility/mcufriend_keil.h"
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#else
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#include "mcufriend_shield.h"
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#include "utility/mcufriend_shield.h"
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#endif
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#define MIPI_DCS_REV1 (1<<0)
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@@ -380,19 +384,24 @@ void MCUFRIEND_kbv::setRotation(uint8_t r)
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// cope with 9320 variants
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else {
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switch (_lcd_ID) {
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#if defined(SUPPORT_0139) || defined(SUPPORT_0154)
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#ifdef SUPPORT_0139
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case 0x0139:
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_SC = 0x46, _EC = 0x46, _SP = 0x48, _EP = 0x47;
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goto common_S6D;
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#endif
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#ifdef SUPPORT_0154
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case 0x0154:
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_SC = 0x37, _EC = 0x36, _SP = 0x39, _EP = 0x38;
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goto common_S6D;
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#endif
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common_S6D:
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_MC = 0x20, _MP = 0x21, _MW = 0x22;
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GS = (val & 0x80) ? (1 << 9) : 0;
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SS = (val & 0x40) ? (1 << 8) : 0;
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WriteCmdData(0x01, GS | SS | 0x0028); // set Driver Output Control
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goto common_ORG;
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#endif
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case 0x5420:
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case 0x7793:
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case 0x9326:
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@@ -685,11 +694,13 @@ void MCUFRIEND_kbv::vertScroll(int16_t top, int16_t scrollines, int16_t offset)
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WriteCmdData(0x43, vsp - top); //SST
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break;
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#endif
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#ifdef SUPPORT_0154
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case 0x0154:
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WriteCmdData(0x31, sea); //SEA
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WriteCmdData(0x32, top); //SSA
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WriteCmdData(0x33, vsp - top); //SST
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break;
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#endif
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#ifdef SUPPORT_1289
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case 0x1289:
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WriteCmdData(0x41, vsp); //VL#
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@@ -796,6 +807,8 @@ static void init_table16(const void *table, int16_t size)
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void MCUFRIEND_kbv::begin(uint16_t ID)
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{
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int16_t *p16; //so we can "write" to a const protected variable.
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const uint8_t *table8_ads = NULL;
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int16_t table_size;
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reset();
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_lcd_xor = 0;
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if (ID == 0)
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@@ -871,13 +884,6 @@ void MCUFRIEND_kbv::begin(uint16_t ID)
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0x000c, 0x0000, //Interface Control: system i/f
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0x0040, 0x0000, //Scan Line
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0x0041, 0x0000, //Vertical Scroll Control
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0x0042, 0x013f, //Screen 1 End
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0x0043, 0x0000, //Screen 1 start
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0x0044, 0x00ef, //Screen 2 end
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0x0045, 0x0000, //Screen 2 start
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0x0046, 0xef00, //Horiz address H=end, L=start
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0x0047, 0x013f, //Vert end
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0x0048, 0x0000, //Vert start
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0x0007, 0x0014, //Display Control: SPT=1, REV=1
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0x0007, 0x0016, //Display Control: SPT=1, REV=1, display on
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0x0007, 0x0017, //Display Control: SPT=1, REV=1, display on, GON
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@@ -885,6 +891,8 @@ void MCUFRIEND_kbv::begin(uint16_t ID)
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init_table16(S6D0139_regValues, sizeof(S6D0139_regValues));
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break;
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#endif
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#ifdef SUPPORT_0154
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case 0x0154:
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_lcd_capable = AUTO_READINC | REV_SCREEN;
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static const uint16_t S6D0154_regValues[] PROGMEM = {
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@@ -931,15 +939,11 @@ void MCUFRIEND_kbv::begin(uint16_t ID)
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TFTLCD_DELAY, 40,
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0x0007, 0x0013, /* GRAM Address Set */
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0x0007, 0x0017, /* Display Control DISPLAY ON */
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0x0036, 0x00EF,
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0x0037, 0x0000,
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0x0038, 0x013F,
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0x0039, 0x0000,
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};
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init_table16(S6D0154_regValues, sizeof(S6D0154_regValues));
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break;
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#endif
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#ifdef SUPPORT_1289
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case 0x1289:
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@@ -995,16 +999,9 @@ void MCUFRIEND_kbv::begin(uint16_t ID)
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case 0x1511: // Unknown from Levy
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_lcd_capable = AUTO_READINC | MIPI_DCS_REV1; //extra read_8(dummy)
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static const uint8_t R61511_regValues[] PROGMEM = {
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0x01, 0, //Soft Reset
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TFTLCD_DELAY8, 120*2, // .kbv will power up with ONLY reset, sleep out, display on
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0x28, 0, //Display Off
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0xB0, 1, 0x00, //Command Access Protect
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0x11, 0, //Sleep Out
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TFTLCD_DELAY8, 150,
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0x29, 0, //Display On
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0x3A, 1, 0x55, //Pixel read=565, write=565
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};
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init_table(R61511_regValues, sizeof(R61511_regValues));
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table8_ads = R61511_regValues, table_size = sizeof(R61511_regValues);
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p16 = (int16_t *) & HEIGHT;
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*p16 = 480;
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p16 = (int16_t *) & WIDTH;
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@@ -1014,34 +1011,20 @@ void MCUFRIEND_kbv::begin(uint16_t ID)
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case 0x1520:
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_lcd_capable = AUTO_READINC | MIPI_DCS_REV1 | MV_AXIS | READ_24BITS;
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static const uint8_t R61520_regValues[] PROGMEM = {
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0x01, 0, //Soft Reset
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TFTLCD_DELAY8, 120*2, // .kbv will power up with ONLY reset, sleep out, display on
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0x28, 0, //Display Off
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0xB0, 1, 0x00, //Command Access Protect
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0xC0, 1, 0x0A, //DM=1, BGR=1
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0x11, 0, //Sleep Out
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TFTLCD_DELAY8, 150,
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0x29, 0, //Display On
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0x3A, 1, 0x55, //Pixel read=565, write=565
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};
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init_table(R61520_regValues, sizeof(R61520_regValues));
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table8_ads = R61520_regValues, table_size = sizeof(R61520_regValues);
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break;
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case 0x1526:
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_lcd_capable = AUTO_READINC | MIPI_DCS_REV1 | MV_AXIS | READ_24BITS;
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static const uint8_t R61526_regValues[] PROGMEM = {
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0x01, 0, //Soft Reset
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TFTLCD_DELAY8, 120*2, // .kbv will power up with ONLY reset, sleep out, display on
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0x28, 0, //Display Off
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0xB0, 1, 0x03, //Command Access Protect
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0xE2, 1, 0x3F, //Command Write Access
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0xC0, 1, 0x22, //REV=0, BGR=1, SS=0
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0x11, 0, //Sleep Out
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TFTLCD_DELAY8, 150,
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0x29, 0, //Display On
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0x3A, 1, 0x55, //Pixel read=565, write=565
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};
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init_table(R61526_regValues, sizeof(R61526_regValues));
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table8_ads = R61526_regValues, table_size = sizeof(R61526_regValues);
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break;
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#if defined(SUPPORT_1963) && USING_16BIT_BUS
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@@ -1049,8 +1032,6 @@ void MCUFRIEND_kbv::begin(uint16_t ID)
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_lcd_capable = AUTO_READINC | MIPI_DCS_REV1 | READ_NODUMMY | INVERT_SS | INVERT_RGB;
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// from NHD 5.0" 8-bit
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static const uint8_t SSD1963_NHD_50_regValues[] PROGMEM = {
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0x01, 0, //Soft Reset
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TFTLCD_DELAY8, 100,
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(0xE0), 1, 0x01, // PLL enable
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TFTLCD_DELAY8, 10,
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(0xE0), 1, 0x03, // Lock PLL
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@@ -1063,12 +1044,9 @@ void MCUFRIEND_kbv::begin(uint16_t ID)
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(0xB6), 7, 0x02, 0x0D, 0x00, 0x20, 0x01, 0x00, 0x00, //VSYNC
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(0x13), 0, //Enter Normal mode
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(0x38), 0, //Exit Idle mode
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0x29, 0, //Display On
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};
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// from NHD 7.0" 8-bit
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static const uint8_t SSD1963_NHD_70_regValues[] PROGMEM = {
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0x01, 0, //Soft Reset
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TFTLCD_DELAY8, 120,
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(0xE2), 3, 0x1D, 0x02, 0x04, //PLL multiplier, set PLL clock to 120M
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(0xE0), 1, 0x01, // PLL enable
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TFTLCD_DELAY8, 10,
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@@ -1083,7 +1061,6 @@ void MCUFRIEND_kbv::begin(uint16_t ID)
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(0xB6), 7, 0x02, 0x0D, 0x00, 0x20, 0x01, 0x00, 0x00, //VSYNC
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(0x13), 0, //Enter Normal mode
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(0x38), 0, //Exit Idle mode
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0x29, 0, //Display On
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};
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// from UTFTv2.81 initlcd.h
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static const uint8_t SSD1963_800_regValues[] PROGMEM = {
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@@ -1134,8 +1111,8 @@ void MCUFRIEND_kbv::begin(uint16_t ID)
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(0xBE), 6, 0x06, 0xF0, 0x01, 0xF0, 0x00, 0x00, //set PWM for B/L
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(0xD0), 1, 0x0D,
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};
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// init_table(SSD1963_480_regValues, sizeof(SSD1963_480_regValues));
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init_table(SSD1963_800_regValues, sizeof(SSD1963_800_regValues));
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// table8_ads = SSD1963_480_regValues, table_size = sizeof(SSD1963_480_regValues);
|
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table8_ads = SSD1963_800_regValues, table_size = sizeof(SSD1963_800_regValues);
|
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p16 = (int16_t *) & HEIGHT;
|
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*p16 = 480;
|
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p16 = (int16_t *) & WIDTH;
|
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@@ -1252,19 +1229,9 @@ case 0x4532: // thanks Leodino
|
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case 0x6814:
|
||||
_lcd_capable = AUTO_READINC | MIPI_DCS_REV1 | MV_AXIS;
|
||||
static const uint8_t RM68140_regValues_max[] PROGMEM = { //
|
||||
0x01, 0, //Soft Reset
|
||||
TFTLCD_DELAY8, 50,
|
||||
0x28, 0, //Display Off
|
||||
#if USING_16BIT_BUS
|
||||
0x3A, 1, 0x55, //Pixel format .kbv my Mega Shield
|
||||
#else
|
||||
0x3A, 1, 0x66, //Pixel format Attila's Uno Shield
|
||||
#endif
|
||||
0x11, 0, //Sleep Out
|
||||
TFTLCD_DELAY8, 150,
|
||||
0x29, 0, //Display On
|
||||
};
|
||||
init_table(RM68140_regValues_max, sizeof(RM68140_regValues_max));
|
||||
table8_ads = RM68140_regValues_max, table_size = sizeof(RM68140_regValues_max);
|
||||
p16 = (int16_t *) & HEIGHT;
|
||||
*p16 = 480;
|
||||
p16 = (int16_t *) & WIDTH;
|
||||
@@ -1272,6 +1239,7 @@ case 0x4532: // thanks Leodino
|
||||
break;
|
||||
#endif
|
||||
|
||||
#ifdef SUPPORT_7781
|
||||
case 0x7783:
|
||||
_lcd_capable = AUTO_READINC | REV_SCREEN | INVERT_GS;
|
||||
static const uint16_t ST7781_regValues[] PROGMEM = {
|
||||
@@ -1308,10 +1276,6 @@ case 0x4532: // thanks Leodino
|
||||
0x0039, 0x0000, // Gamma Control 10
|
||||
0x003C, 0x0203, // Gamma Control 13
|
||||
0x003D, 0x0403, // Gamma Control 14
|
||||
0x0050, 0x0000, // Window Horizontal RAM Address Start (R50h)
|
||||
0x0051, 240 - 1, // Window Horizontal RAM Address End (R51h)
|
||||
0x0052, 0X0000, // Window Vertical RAM Address Start (R52h)
|
||||
0x0053, 320 - 1, // Window Vertical RAM Address End (R53h)
|
||||
0x0060, 0xA700, // Driver Output Control (R60h) .kbv was 0xa700
|
||||
0x0061, 0x0001, // Driver Output Control (R61h)
|
||||
0x0090, 0X0029, // Panel Interface Control 1 (R90h)
|
||||
@@ -1322,15 +1286,11 @@ case 0x4532: // thanks Leodino
|
||||
};
|
||||
init_table16(ST7781_regValues, sizeof(ST7781_regValues));
|
||||
break;
|
||||
#endif
|
||||
|
||||
case 0x7789:
|
||||
_lcd_capable = AUTO_READINC | MIPI_DCS_REV1 | MV_AXIS | READ_24BITS;
|
||||
static const uint8_t ST7789_regValues[] PROGMEM = {
|
||||
0x01, 0, //Soft Reset
|
||||
(0x11), 0, //exit SLEEP mode
|
||||
TFTLCD_DELAY8, 100, // if from Sleep
|
||||
(0x36), 1, 0x80, //MADCTL: memory data access control
|
||||
// (0x3A), 1, 0x66, //COLMOD: Interface Pixel format *** I use 262K-colors in 18bit/pixel format when using 8-bit interface to allow 3-bytes per pixel
|
||||
(0x3A), 1, 0x55, //COLMOD: Interface Pixel format *** I use 65K-colors in 16bit/pixel (5-6-5) format when using 16-bit interface to allow 1-byte per pixel
|
||||
(0xB2), 5, 0x0C, 0x0C, 0x00, 0x33, 0x33, //PORCTRK: Porch setting [08 08 00 22 22] PSEN=0 anyway
|
||||
(0xB7), 1, 0x35, //GCTRL: Gate Control [35]
|
||||
(0xBB), 1, 0x2B, //VCOMS: VCOM setting VCOM=1.175 [20] VCOM=0.9
|
||||
@@ -1342,17 +1302,8 @@ case 0x4532: // thanks Leodino
|
||||
(0xD0), 2, 0xA4, 0xA1, //PWCTRL1: Power Control 1 [A4 A1]
|
||||
(0xE0), 14, 0xD0, 0x00, 0x05, 0x0E, 0x15, 0x0D, 0x37, 0x43, 0x47, 0x09, 0x15, 0x12, 0x16, 0x19, //PVGAMCTRL: Positive Voltage Gamma control
|
||||
(0xE1), 14, 0xD0, 0x00, 0x05, 0x0D, 0x0C, 0x06, 0x2D, 0x44, 0x40, 0x0E, 0x1C, 0x18, 0x16, 0x19, //NVGAMCTRL: Negative Voltage Gamma control
|
||||
(0x2A), 4, 0x00, 0x00, 0x00, 0xEF, //X address set
|
||||
(0x2B), 4, 0x00, 0x00, 0x01, 0x3F, //Y address set
|
||||
0x29, 0, //Display On
|
||||
TFTLCD_DELAY8, 10,
|
||||
};
|
||||
static const uint8_t ST7789_regValues_arcain6[] PROGMEM = {
|
||||
0x01, 0, //Soft Reset
|
||||
(0x11), 0, //exit SLEEP mode
|
||||
TFTLCD_DELAY8, 100, // if from Sleep
|
||||
(0x36), 1, 0x00, //MADCTL: memory data access control
|
||||
(0x3A), 1, 0x05, //COLMOD: Interface Pixel format *** I use 65K-colors in 16bit/pixel (5-6-5) format when using 16-bit interface to allow 1-byte per pixel
|
||||
(0xB2), 5, 0x0C, 0x0C, 0x00, 0x33, 0x33, //PORCTRK: Porch setting [08 08 00 22 22] PSEN=0 anyway
|
||||
(0xB7), 1, 0x35, //GCTRL: Gate Control [35]
|
||||
(0xBB), 1, 0x35, //VCOMS: VCOM setting VCOM=??? [20] VCOM=0.9
|
||||
@@ -1367,13 +1318,10 @@ case 0x4532: // thanks Leodino
|
||||
(0xD0), 2, 0xA4, 0xA1, //PWCTRL1: Power Control 1 [A4 A1]
|
||||
(0xE0), 14, 0xD0, 0x00, 0x06, 0x09, 0x0B, 0x2A, 0x3C, 0x55, 0x4B, 0x08, 0x16, 0x14, 0x19, 0x20, //PVGAMCTRL: Positive Voltage Gamma control
|
||||
(0xE1), 14, 0xD0, 0x00, 0x06, 0x09, 0x0B, 0x29, 0x36, 0x54, 0x4B, 0x0D, 0x16, 0x14, 0x21, 0x20, //NVGAMCTRL: Negative Voltage Gamma control
|
||||
// (0x2A), 4, 0x00, 0x00, 0x00, 0xEF, //X address set
|
||||
// (0x2B), 4, 0x00, 0x00, 0x01, 0x3F, //Y address set
|
||||
0x29, 0, //Display On
|
||||
TFTLCD_DELAY8, 10,
|
||||
};
|
||||
init_table(ST7789_regValues, sizeof(ST7789_regValues)); //
|
||||
table8_ads = ST7789_regValues, table_size = sizeof(ST7789_regValues); //
|
||||
break;
|
||||
|
||||
#ifdef SUPPORT_8347D
|
||||
case 0x4747: //HX8347-D
|
||||
_lcd_capable = REV_SCREEN | MIPI_DCS_REV1 | MV_AXIS | INVERT_SS;
|
||||
@@ -1422,11 +1370,6 @@ case 0x4532: // thanks Leodino
|
||||
0x28, 1, 0x3F, //GON=1, DTE=1, D=1100
|
||||
|
||||
0x16, 1, 0x18,
|
||||
//Set GRAM Area
|
||||
0x02, 2, 0x00, 0x00, //Column Start
|
||||
0x04, 2, 0x00, 0xEF, //Column End
|
||||
0x06, 2, 0x00, 0x00, //Row Start
|
||||
0x08, 2, 0x01, 0x3F, //Row End
|
||||
};
|
||||
init_table(HX8347G_2_regValues, sizeof(HX8347G_2_regValues));
|
||||
break;
|
||||
@@ -1435,7 +1378,7 @@ case 0x4532: // thanks Leodino
|
||||
#ifdef SUPPORT_8352A
|
||||
case 0x5252: //HX8352-A
|
||||
_lcd_capable = MIPI_DCS_REV1 | MV_AXIS;
|
||||
is8347 = 1;
|
||||
is8347 = 1;
|
||||
static const uint8_t HX8352A_regValues[] PROGMEM = {
|
||||
0x83, 1, 0x02, //Test Mode: TESTM=1
|
||||
0x85, 1, 0x03, //VDD ctl : VDC_SEL=3 [05]
|
||||
@@ -1472,11 +1415,6 @@ case 0x4532: // thanks Leodino
|
||||
0x16, 1, 0x1C, //Memaccess: GS=1, BGR=1, SS=1
|
||||
0x01, 1, 0x06, //Disp Mode: INVON=1, NORON=1 [02]
|
||||
0x55, 1, 0x06, //SM_PANEL=0, SS_PANEL=0, GS_PANEL=1, REV_PANEL=1, BGR_PANEL=0
|
||||
//Set GRAM Area
|
||||
0x02, 2, 0x00, 0x00, //Column Start
|
||||
0x04, 2, 0x00, 0xEF, //Column End
|
||||
0x06, 2, 0x00, 0x00, //Row Start
|
||||
0x08, 2, 0x01, 0x8F, //Row End
|
||||
};
|
||||
init_table(HX8352A_regValues, sizeof(HX8352A_regValues));
|
||||
p16 = (int16_t *) & HEIGHT;
|
||||
@@ -1490,11 +1428,6 @@ case 0x4532: // thanks Leodino
|
||||
static const uint8_t HX8347A_CMO32_regValues[] PROGMEM = {
|
||||
// VENDOR Gamma for 3.2"
|
||||
(0x46), 12, 0xA4, 0x53, 0x00, 0x44, 0x04, 0x67, 0x33, 0x77, 0x12, 0x4C, 0x46, 0x44,
|
||||
//240x320 window setting
|
||||
(0x02), 2, 0x00, 0x00, // Column address start2
|
||||
(0x04), 2, 0x00, 0xEF, // Column address end2
|
||||
(0x06), 2, 0x00, 0x00, // Row address start2
|
||||
(0x08), 2, 0x01, 0x3F, // Row address end2
|
||||
// Display Setting
|
||||
(0x01), 1, 0x06, // IDMON=0, INVON=1, NORON=1, PTLON=0
|
||||
(0x16), 1, 0x48, // MY=0, MX=0, MV=0, ML=1, BGR=0, TEON=0
|
||||
@@ -1543,11 +1476,6 @@ case 0x4532: // thanks Leodino
|
||||
static const uint8_t HX8347A_CMO24_regValues[] PROGMEM = {
|
||||
// VENDOR Gamma for 2.4"
|
||||
(0x46), 12, 0x94, 0x41, 0x00, 0x33, 0x23, 0x45, 0x44, 0x77, 0x12, 0xCC, 0x46, 0x82,
|
||||
//240x320 window setting
|
||||
(0x02), 2, 0x00, 0x00, // Column address start2
|
||||
(0x04), 2, 0x00, 0xEF, // Column address end2
|
||||
(0x06), 2, 0x00, 0x00, // Row address start2
|
||||
(0x08), 2, 0x01, 0x3F, // Row address end2
|
||||
// Display Setting
|
||||
(0x01), 1, 0x06, // IDMON=0, INVON=1, NORON=1, PTLON=0
|
||||
(0x16), 1, 0x48, // MY=0, MX=0, MV=0, ML=1, BGR=0, TEON=0
|
||||
@@ -1595,11 +1523,6 @@ case 0x4532: // thanks Leodino
|
||||
static const uint8_t HX8347A_ITDB02_regValues[] PROGMEM = {
|
||||
// VENDOR Gamma ITDB02 same as CMO32. Delays are shorter than AN01
|
||||
(0x46), 12, 0xA4, 0x53, 0x00, 0x44, 0x04, 0x67, 0x33, 0x77, 0x12, 0x4C, 0x46, 0x44,
|
||||
//240x320 window setting
|
||||
(0x02), 2, 0x00, 0x00, // Column address start2
|
||||
(0x04), 2, 0x00, 0xEF, // Column address end2
|
||||
(0x06), 2, 0x00, 0x00, // Row address start2
|
||||
(0x08), 2, 0x01, 0x3F, // Row address end2
|
||||
// Display Setting
|
||||
(0x01), 1, 0x06, // IDMON=0, INVON=1, NORON=1, PTLON=0
|
||||
(0x16), 1, 0xC8, // MY=0, MX=0, MV=0, ML=1, BGR=0, TEON=0 .itead
|
||||
@@ -1646,10 +1569,6 @@ case 0x4532: // thanks Leodino
|
||||
static const uint8_t HX8347A_NHD_regValues[] PROGMEM = {
|
||||
//Gamma Setting NHD
|
||||
(0x46), 12, 0x94, 0x41, 0x00, 0x33, 0x23, 0x45, 0x44, 0x77, 0x12, 0xCC, 0x46, 0x82,
|
||||
(0x02), 2, 0x00, 0x00, //COLSTARTH
|
||||
(0x04), 2, 0x00, 0xEF, //COLENDH
|
||||
(0x06), 2, 0x00, 0x00, //ROWSTARTH
|
||||
(0x08), 2, 0x01, 0x3F, //ROWENDH
|
||||
(0x01), 1, 0x06, //Display Mode [06]
|
||||
(0x16), 1, 0xC8, //MADCTL [00] MY=1, MX=1, BGR=1
|
||||
// (0x70), 1, 0x05, //Panel [06] 16-bit
|
||||
@@ -1701,15 +1620,9 @@ case 0x4532: // thanks Leodino
|
||||
case 0x8357:
|
||||
_lcd_capable = AUTO_READINC | MIPI_DCS_REV1 | MV_AXIS | REV_SCREEN | READ_24BITS;
|
||||
static const uint8_t HX8357D_regValues[] PROGMEM = {
|
||||
0x01, 0, //Soft Reset
|
||||
TFTLCD_DELAY8, 50,
|
||||
0x28, 0, //Display Off
|
||||
0x3A, 1, 0x55, //Interlace Pixel
|
||||
0x11, 0, //Sleep Out
|
||||
TFTLCD_DELAY8, 50,
|
||||
0x29, 0, //Display On
|
||||
0xB0, 1, 0x00, // unlocks E0, F0
|
||||
};
|
||||
init_table(HX8357D_regValues, sizeof(HX8357D_regValues));
|
||||
table8_ads = HX8357D_regValues, table_size = sizeof(HX8357D_regValues);
|
||||
p16 = (int16_t *) & HEIGHT;
|
||||
*p16 = 480;
|
||||
p16 = (int16_t *) & WIDTH;
|
||||
@@ -1761,10 +1674,6 @@ case 0x4532: // thanks Leodino
|
||||
0x003C, 0x0704,
|
||||
0x003D, 0x0807,
|
||||
//-----Set RAM area-----------------------
|
||||
0x0050, 0x0000,
|
||||
0x0051, 0x00EF,
|
||||
0x0052, 0x0000,
|
||||
0x0053, 0x013F,
|
||||
0x0060, 0xA700, //GS=1
|
||||
0x0061, 0x0001,
|
||||
0x006A, 0x0000,
|
||||
@@ -1794,11 +1703,11 @@ case 0x4532: // thanks Leodino
|
||||
_lcd_capable = 0 | REV_SCREEN | INVERT_GS | AUTO_READINC;
|
||||
goto common_93x5;
|
||||
case 0x9328:
|
||||
case 0x9325:
|
||||
case 0x9325:
|
||||
_lcd_capable = 0 | REV_SCREEN | INVERT_GS;
|
||||
goto common_93x5;
|
||||
case 0x9331:
|
||||
case 0x9335:
|
||||
case 0x9335:
|
||||
_lcd_capable = 0 | REV_SCREEN;
|
||||
common_93x5:
|
||||
static const uint16_t ILI9325_regValues[] PROGMEM = {
|
||||
@@ -1846,10 +1755,6 @@ case 0x4532: // thanks Leodino
|
||||
0x003D, 0x0808,
|
||||
|
||||
//------------------ Set GRAM area ---------------//
|
||||
0x0050, 0x0000, // Horizontal GRAM Start Address
|
||||
0x0051, 0x00EF, // Horizontal GRAM End Address
|
||||
0x0052, 0x0000, // Vertical GRAM Start Address
|
||||
0x0053, 0x013F, // Vertical GRAM Start Address
|
||||
0x0060, 0x2700, // Gate Scan Line GS=0 [0xA700]
|
||||
0x0061, 0x0001, // NDL,VLE, REV .kbv
|
||||
0x006A, 0x0000, // set scrolling line
|
||||
@@ -1867,6 +1772,8 @@ case 0x4532: // thanks Leodino
|
||||
};
|
||||
init_table16(ILI9325_regValues, sizeof(ILI9325_regValues));
|
||||
break;
|
||||
|
||||
#if defined(SUPPORT_9326_5420)
|
||||
case 0x5420:
|
||||
case 0x9326:
|
||||
_lcd_capable = REV_SCREEN | READ_BGR;
|
||||
@@ -1909,10 +1816,6 @@ case 0x4532: // thanks Leodino
|
||||
0x030C, 0x0000, //
|
||||
0x030D, 0x000A, //
|
||||
//------------------ Set GRAM area ---------------//
|
||||
0x0210, 0x0000, // Horizontal GRAM Start Address
|
||||
0x0211, 0x00EF, // Horizontal GRAM End Address
|
||||
0x0212, 0x0000, // Vertical GRAM Start Address
|
||||
0x0213, 0x01AF, // Vertical GRAM Start Address
|
||||
0x0400, 0x3100, // Gate Scan Line 400 lines
|
||||
0x0401, 0x0001, // NDL,VLE, REV
|
||||
0x0404, 0x0000, // set scrolling line
|
||||
@@ -1935,15 +1838,13 @@ case 0x4532: // thanks Leodino
|
||||
p16 = (int16_t *) & WIDTH;
|
||||
*p16 = 240;
|
||||
break;
|
||||
#endif
|
||||
|
||||
case 0x9327:
|
||||
_lcd_capable = AUTO_READINC | MIPI_DCS_REV1 | MV_AXIS;
|
||||
static const uint8_t ILI9327_regValues[] PROGMEM = {
|
||||
0x01, 0, //Soft Reset
|
||||
0x28, 0, //Display Off
|
||||
// 0xE0, 1, 0x20, //NV Memory Write [00]
|
||||
0x11, 0, //Sleep Out
|
||||
TFTLCD_DELAY8, 100,
|
||||
0xB0, 1, 0x00, //Disable Protect for cmds B1-DF, E0-EF, F0-FF
|
||||
// 0xE0, 1, 0x20, //NV Memory Write [00]
|
||||
// 0xD1, 3, 0x00, 0x71, 0x19, //VCOM control [00 40 0F]
|
||||
// 0xD0, 3, 0x07, 0x01, 0x08, //Power Setting [07 04 8C]
|
||||
0xC1, 4, 0x10, 0x10, 0x02, 0x02, //Display Timing [10 10 02 02]
|
||||
@@ -1955,14 +1856,8 @@ case 0x4532: // thanks Leodino
|
||||
0xCA, 1, 0x00, //DGC LUT ???
|
||||
0xEA, 1, 0x80, //3-Gamma Function Enable
|
||||
// 0xB0, 1, 0x03, //Enable Protect
|
||||
0x36, 1, 0x48, // Memory Access
|
||||
0x3A, 1, 0x55, //Pixel read=565, write=565
|
||||
0x2A, 4, 0x00, 0x00, 0x00, 0xEF, // wid: 0, 239
|
||||
0x2B, 4, 0x00, 0x00, 0x01, 0x8F, // ht: 0, 399
|
||||
0x30, 4, 0x00, 0x00, 0x01, 0x8F, // Partial Area: 0, 399
|
||||
0x29, 0, //Display On
|
||||
};
|
||||
init_table(ILI9327_regValues, sizeof(ILI9327_regValues));
|
||||
table8_ads = ILI9327_regValues, table_size = sizeof(ILI9327_regValues);
|
||||
p16 = (int16_t *) & HEIGHT;
|
||||
*p16 = 400;
|
||||
p16 = (int16_t *) & WIDTH;
|
||||
@@ -1984,25 +1879,15 @@ case 0x4532: // thanks Leodino
|
||||
_lcd_capable = AUTO_READINC | MIPI_DCS_REV1 | MV_AXIS | INVERT_SS | REV_SCREEN;
|
||||
common_9329:
|
||||
static const uint8_t ILI9329_regValues[] PROGMEM = {
|
||||
0x01, 0, //Soft Reset
|
||||
TFTLCD_DELAY8, 50, // .kbv will power up with ONLY reset, sleep out, display on
|
||||
0x28, 0, //Display Off
|
||||
// 0xF6, 3, 0x01, 0x01, 0x00, //Interface Control needs EXTC=1 MX_EOR=1, TM=0, RIM=0
|
||||
// 0xB6, 3, 0x0A, 0x82, 0x27, //Display Function [0A 82 27]
|
||||
// 0xB7, 1, 0x06, //Entry Mode Set [06]
|
||||
0x11, 0, //Sleep Out
|
||||
TFTLCD_DELAY8, 150,
|
||||
0x29, 0, //Display On
|
||||
0x3A, 1, 0x55, //Pixel read=565, write=565
|
||||
};
|
||||
init_table(ILI9329_regValues, sizeof(ILI9329_regValues));
|
||||
table8_ads = ILI9329_regValues, table_size = sizeof(ILI9329_regValues);
|
||||
break;
|
||||
case 0x9341:
|
||||
_lcd_capable = AUTO_READINC | MIPI_DCS_REV1 | MV_AXIS | READ_24BITS;
|
||||
static const uint8_t ILI9341_regValues_2_4[] PROGMEM = { // BOE 2.4"
|
||||
0x01, 0, // software reset
|
||||
TFTLCD_DELAY8, 50, // .kbv will power up with ONLY reset, sleep out, display on
|
||||
0x28, 0, //Display Off
|
||||
0xF6, 3, 0x01, 0x01, 0x00, //Interface Control needs EXTC=1 MV_EOR=0, TM=0, RIM=0
|
||||
0xCF, 3, 0x00, 0x81, 0x30, //Power Control B [00 81 30]
|
||||
0xED, 4, 0x64, 0x03, 0x12, 0x81, //Power On Seq [55 01 23 01]
|
||||
@@ -2023,15 +1908,8 @@ case 0x4532: // thanks Leodino
|
||||
0x26, 1, 0x01, //Gamma Set [01]
|
||||
0xE0, 15, 0x0f, 0x26, 0x24, 0x0b, 0x0e, 0x09, 0x54, 0xa8, 0x46, 0x0c, 0x17, 0x09, 0x0f, 0x07, 0x00,
|
||||
0xE1, 15, 0x00, 0x19, 0x1b, 0x04, 0x10, 0x07, 0x2a, 0x47, 0x39, 0x03, 0x06, 0x06, 0x30, 0x38, 0x0f,
|
||||
0x11, 0, //Sleep Out
|
||||
TFTLCD_DELAY8, 150,
|
||||
0x29, 0, //Display On
|
||||
0x3A, 1, 0x55, //Pixel Format [66]
|
||||
};
|
||||
static const uint8_t ILI9341_regValues_ada[] PROGMEM = { // Adafruit_TFTLCD only works with EXTC=0
|
||||
0x01, 0, // software reset
|
||||
TFTLCD_DELAY8, 50,
|
||||
0x28, 0, //Display Off
|
||||
// 0xF6, 3, 0x00, 0x01, 0x00, //Interface Control needs EXTC=1 TM=0, RIM=0
|
||||
// 0xF6, 3, 0x01, 0x01, 0x03, //Interface Control needs EXTC=1 RM=1, RIM=1
|
||||
0xF6, 3, 0x09, 0x01, 0x03, //Interface Control needs EXTC=1 RM=0, RIM=1
|
||||
@@ -2044,19 +1922,15 @@ case 0x4532: // thanks Leodino
|
||||
0x36, 1, 0x88, //Memory Access [00]
|
||||
0xB1, 2, 0x00, 0x1B, //Frame Control [00 1B]
|
||||
0xB7, 1, 0x07, //Entry Mode [00]
|
||||
0x11, 0, //Sleep Out
|
||||
TFTLCD_DELAY8, 150,
|
||||
0x29, 0, //Display On
|
||||
0x3A, 1, 0x55, //Pixel Format [66]
|
||||
};
|
||||
#if !defined(USE_SERIAL)
|
||||
if (readReg32(0xD3) == 0x0000) { //weird DealExtreme EXTC=0 shield
|
||||
init_table(ILI9341_regValues_ada, sizeof(ILI9341_regValues_ada));
|
||||
table8_ads = ILI9341_regValues_ada, table_size = sizeof(ILI9341_regValues_ada);
|
||||
_lcd_capable |= REV_SCREEN | READ_BGR;
|
||||
} else
|
||||
#endif
|
||||
{
|
||||
init_table(ILI9341_regValues_2_4, sizeof(ILI9341_regValues_2_4)); //
|
||||
table8_ads = ILI9341_regValues_2_4, table_size = sizeof(ILI9341_regValues_2_4); //
|
||||
}
|
||||
break;
|
||||
case 0x1581:
|
||||
@@ -2066,10 +1940,6 @@ case 0x4532: // thanks Leodino
|
||||
_lcd_capable = AUTO_READINC | MIPI_DCS_REV1 | MV_AXIS | READ_BGR;
|
||||
common_9481:
|
||||
static const uint8_t ILI9481_regValues[] PROGMEM = { // Atmel MaxTouch
|
||||
0x01, 0, //Soft Reset
|
||||
TFTLCD_DELAY8, 125,
|
||||
0x11, 0, //Sleep Out
|
||||
TFTLCD_DELAY8, 20,
|
||||
0xB0, 1, 0x00, // unlocks E0, F0
|
||||
0xB3, 4, 0x02, 0x00, 0x00, 0x00, //Frame Memory, interface [02 00 00 00]
|
||||
0xB4, 1, 0x00, // Frame mode [00]
|
||||
@@ -2084,19 +1954,8 @@ case 0x4532: // thanks Leodino
|
||||
0xC6, 1, 0x02, //Interface Control [02]
|
||||
0xC8, 12, 0x00, 0x32, 0x36, 0x45, 0x06, 0x16, 0x37, 0x75, 0x77, 0x54, 0x0C, 0x00,
|
||||
0xCC, 1, 0x00, //Panel Control [00]
|
||||
// 0x36, 1, 0x0A, //Memory Access [00]
|
||||
|
||||
0x3A, 1, 0x55, //Interlace Pixel Format [XX]
|
||||
0x11, 0, //Sleep Out
|
||||
TFTLCD_DELAY8, 120,
|
||||
0x29, 0, //Display On
|
||||
TFTLCD_DELAY8, 25,
|
||||
};
|
||||
static const uint8_t ILI9481_CPT29_regValues[] PROGMEM = { // 320x430
|
||||
0x01, 0, //Soft Reset
|
||||
TFTLCD_DELAY8, 125,
|
||||
0x11, 0, //Sleep Out
|
||||
TFTLCD_DELAY8, 20,
|
||||
0xB0, 1, 0x00,
|
||||
0xD0, 3, 0x07, 0x42, 0x1C, // Set Power [00 43 18]
|
||||
0xD1, 3, 0x00, 0x02, 0x0F, // Set VCOM [00 00 00] x0.695, x1.00
|
||||
@@ -2107,21 +1966,8 @@ case 0x4532: // thanks Leodino
|
||||
0xE4, 1, 0xA0,
|
||||
0xF0, 1, 0x01,
|
||||
0xF3, 2, 0x02, 0x1A,
|
||||
0x36, 1, 0x0A, //Memory Access [00]
|
||||
0x2A, 4, 0x00, 0x00, 0x01, 0x3F,
|
||||
0x2B, 4, 0x00, 0x00, 0x01, 0xAD,
|
||||
|
||||
0x3A, 1, 0x55, //Interlace Pixel Format [XX]
|
||||
0x11, 0, //Sleep Out
|
||||
TFTLCD_DELAY8, 120,
|
||||
0x29, 0, //Display On
|
||||
TFTLCD_DELAY8, 25,
|
||||
};
|
||||
static const uint8_t ILI9481_PVI35_regValues[] PROGMEM = { // 320x480
|
||||
0x01, 0, //Soft Reset
|
||||
TFTLCD_DELAY8, 125,
|
||||
0x11, 0, //Sleep Out
|
||||
TFTLCD_DELAY8, 20,
|
||||
0xB0, 1, 0x00,
|
||||
0xD0, 3, 0x07, 0x41, 0x1D, // Set Power [00 43 18]
|
||||
0xD1, 3, 0x00, 0x2B, 0x1F, // Set VCOM [00 00 00] x0.900, x1.32
|
||||
@@ -2132,19 +1978,8 @@ case 0x4532: // thanks Leodino
|
||||
0xE4, 1, 0xA0,
|
||||
0xF0, 1, 0x01,
|
||||
0xF3, 2, 0x40, 0x0A,
|
||||
0x36, 1, 0x0A, //Memory Access [00]
|
||||
|
||||
0x3A, 1, 0x55, //Interlace Pixel Format [XX]
|
||||
0x11, 0, //Sleep Out
|
||||
TFTLCD_DELAY8, 120,
|
||||
0x29, 0, //Display On
|
||||
TFTLCD_DELAY8, 25,
|
||||
};
|
||||
static const uint8_t ILI9481_AUO317_regValues[] PROGMEM = { // 320x480
|
||||
0x01, 0, //Soft Reset
|
||||
TFTLCD_DELAY8, 125,
|
||||
0x11, 0, //Sleep Out
|
||||
TFTLCD_DELAY8, 20,
|
||||
0xB0, 1, 0x00,
|
||||
0xD0, 3, 0x07, 0x40, 0x1D, // Set Power [00 43 18]
|
||||
0xD1, 3, 0x00, 0x18, 0x13, // Set VCOM [00 00 00] x0.805, x1.08
|
||||
@@ -2154,19 +1989,8 @@ case 0x4532: // thanks Leodino
|
||||
0xC8, 12, 0x00, 0x44, 0x06, 0x44, 0x0A, 0x08, 0x17, 0x33, 0x77, 0x44, 0x08, 0x0C,
|
||||
0xE4, 1, 0xA0,
|
||||
0xF0, 1, 0x01,
|
||||
0x36, 1, 0x0A, //Memory Access [00]
|
||||
|
||||
0x3A, 1, 0x55, //Interlace Pixel Format [XX]
|
||||
0x11, 0, //Sleep Out
|
||||
TFTLCD_DELAY8, 120,
|
||||
0x29, 0, //Display On
|
||||
TFTLCD_DELAY8, 25,
|
||||
};
|
||||
static const uint8_t ILI9481_CMO35_regValues[] PROGMEM = { // 320480
|
||||
0x01, 0, //Soft Reset
|
||||
TFTLCD_DELAY8, 125,
|
||||
0x11, 0, //Sleep Out
|
||||
TFTLCD_DELAY8, 20,
|
||||
0xB0, 1, 0x00,
|
||||
0xD0, 3, 0x07, 0x41, 0x1D, // Set Power [00 43 18] 07,41,1D
|
||||
0xD1, 3, 0x00, 0x1C, 0x1F, // Set VCOM [00 00 00] x0.825, x1.32 1C,1F
|
||||
@@ -2179,18 +2003,8 @@ case 0x4532: // thanks Leodino
|
||||
0xE4, 1, 0xA0, //?SETCABC on Himax
|
||||
0x36, 1, 0x48, //Memory Access [00]
|
||||
0xB4, 1, 0x11,
|
||||
|
||||
0x3A, 1, 0x55, //Interlace Pixel Format [XX]
|
||||
0x11, 0, //Sleep Out
|
||||
TFTLCD_DELAY8, 120,
|
||||
0x29, 0, //Display On
|
||||
TFTLCD_DELAY8, 25,
|
||||
};
|
||||
static const uint8_t ILI9481_RGB_regValues[] PROGMEM = { // 320x480
|
||||
0x01, 0, //Soft Reset
|
||||
TFTLCD_DELAY8, 125,
|
||||
0x11, 0, //Sleep Out
|
||||
TFTLCD_DELAY8, 20,
|
||||
0xB0, 1, 0x00,
|
||||
0xD0, 3, 0x07, 0x41, 0x1D, // SETPOWER [00 43 18]
|
||||
0xD1, 3, 0x00, 0x2B, 0x1F, // SETVCOM [00 00 00] x0.900, x1.32
|
||||
@@ -2207,23 +2021,13 @@ case 0x4532: // thanks Leodino
|
||||
0xB4, 1, 0x00, //SETDISPLAY
|
||||
// 0xB3, 4, 0x00, 0x01, 0x06, 0x01, //SETGRAM simple example
|
||||
0xB3, 4, 0x00, 0x01, 0x06, 0x30, //jpegs example
|
||||
0x36, 1, 0x48, //Memory Access [00]
|
||||
0x3A, 1, 0x66, //Interlace Pixel Format [XX]
|
||||
0x20, 0, //INVOFF
|
||||
// 0x21, 0, //INVON
|
||||
|
||||
// 0x3A, 1, 0x55, //Interlace Pixel Format [XX]
|
||||
0x11, 0, //Sleep Out
|
||||
TFTLCD_DELAY8, 120,
|
||||
0x29, 0, //Display On
|
||||
TFTLCD_DELAY8, 25,
|
||||
};
|
||||
init_table(ILI9481_regValues, sizeof(ILI9481_regValues));
|
||||
// init_table(ILI9481_CPT29_regValues, sizeof(ILI9481_CPT29_regValues));
|
||||
// init_table(ILI9481_PVI35_regValues, sizeof(ILI9481_PVI35_regValues));
|
||||
// init_table(ILI9481_AUO317_regValues, sizeof(ILI9481_AUO317_regValues));
|
||||
// init_table(ILI9481_CMO35_regValues, sizeof(ILI9481_CMO35_regValues));
|
||||
// init_table(ILI9481_RGB_regValues, sizeof(ILI9481_RGB_regValues));
|
||||
table8_ads = ILI9481_regValues, table_size = sizeof(ILI9481_regValues);
|
||||
// table8_ads = ILI9481_CPT29_regValues, table_size = sizeof(ILI9481_CPT29_regValues);
|
||||
// table8_ads = ILI9481_PVI35_regValues, table_size = sizeof(ILI9481_PVI35_regValues);
|
||||
// table8_ads = ILI9481_AUO317_regValues, table_size = sizeof(ILI9481_AUO317_regValues);
|
||||
// table8_ads = ILI9481_CMO35_regValues, table_size = sizeof(ILI9481_CMO35_regValues);
|
||||
// table8_ads = ILI9481_RGB_regValues, table_size = sizeof(ILI9481_RGB_regValues);
|
||||
p16 = (int16_t *) & HEIGHT;
|
||||
*p16 = 480;
|
||||
p16 = (int16_t *) & WIDTH;
|
||||
@@ -2232,9 +2036,6 @@ case 0x4532: // thanks Leodino
|
||||
case 0x9486:
|
||||
_lcd_capable = AUTO_READINC | MIPI_DCS_REV1 | MV_AXIS | REV_SCREEN;
|
||||
static const uint8_t ILI9486_regValues[] PROGMEM = {
|
||||
0x01, 0, //Soft Reset
|
||||
TFTLCD_DELAY8, 50,
|
||||
0x28, 0, //Display Off
|
||||
0xC0, 2, 0x0d, 0x0d, //Power Control 1 [0E 0E]
|
||||
0xC1, 2, 0x43, 0x00, //Power Control 2 [43 00]
|
||||
0xC2, 1, 0x00, //Power Control 3 [33]
|
||||
@@ -2265,15 +2066,8 @@ case 0x4532: // thanks Leodino
|
||||
0xE0, 15, 0x0F, 0x10, 0x08, 0x05, 0x09, 0x05, 0x37, 0x98, 0x26, 0x07, 0x0F, 0x02, 0x09, 0x07, 0x00,
|
||||
0xE1, 15, 0x0F, 0x38, 0x36, 0x0D, 0x10, 0x08, 0x59, 0x76, 0x48, 0x0A, 0x16, 0x0A, 0x37, 0x2F, 0x00,
|
||||
#endif
|
||||
0x20, 0, // Display Inversion OFF
|
||||
0x36, 1, 0x0A, //Memory Access
|
||||
0x3A, 1, 0x55, //Interlace Pixel
|
||||
// 0x21, 0, //Invert display !!!
|
||||
0x11, 0, //Sleep Out
|
||||
TFTLCD_DELAY8, 50,
|
||||
0x29, 0, //Display On
|
||||
};
|
||||
init_table(ILI9486_regValues, sizeof(ILI9486_regValues));
|
||||
table8_ads = ILI9486_regValues, table_size = sizeof(ILI9486_regValues);
|
||||
p16 = (int16_t *) & HEIGHT;
|
||||
*p16 = 480;
|
||||
p16 = (int16_t *) & WIDTH;
|
||||
@@ -2286,9 +2080,6 @@ case 0x4532: // thanks Leodino
|
||||
_lcd_capable = AUTO_READINC | MIPI_DCS_REV1 | MV_AXIS | READ_24BITS;
|
||||
common_9488:
|
||||
static const uint8_t ILI9488_regValues_max[] PROGMEM = { // Atmel MaxTouch
|
||||
0x01, 0, //Soft Reset
|
||||
TFTLCD_DELAY8, 50,
|
||||
0x28, 0, //Display Off
|
||||
0xC0, 2, 0x10, 0x10, //Power Control 1 [0E 0E]
|
||||
0xC1, 1, 0x41, //Power Control 2 [43]
|
||||
0xC5, 4, 0x00, 0x22, 0x80, 0x40, //VCOM Control 1 [00 40 00 40]
|
||||
@@ -2300,18 +2091,15 @@ case 0x4532: // thanks Leodino
|
||||
0xB7, 1, 0xC6, //Entry Mode [06]
|
||||
0x3A, 1, 0x55, //Interlace Pixel Format [XX]
|
||||
0xF7, 4, 0xA9, 0x51, 0x2C, 0x82, //Adjustment Control 3 [A9 51 2C 82]
|
||||
0x11, 0, //Sleep Out
|
||||
TFTLCD_DELAY8, 150,
|
||||
0x29, 0, //Display On
|
||||
};
|
||||
init_table(ILI9488_regValues_max, sizeof(ILI9488_regValues_max));
|
||||
table8_ads = ILI9488_regValues_max, table_size = sizeof(ILI9488_regValues_max);
|
||||
p16 = (int16_t *) & HEIGHT;
|
||||
*p16 = 480;
|
||||
p16 = (int16_t *) & WIDTH;
|
||||
*p16 = 320;
|
||||
break;
|
||||
case 0xB505: //R61505V
|
||||
case 0xC505: //R61505W
|
||||
case 0xC505: //R61505W
|
||||
_lcd_capable = 0 | REV_SCREEN | READ_LOWHIGH;
|
||||
static const uint16_t R61505V_regValues[] PROGMEM = {
|
||||
0x0000, 0x0000,
|
||||
@@ -2353,10 +2141,6 @@ case 0x4532: // thanks Leodino
|
||||
// 0x000C, 0x0001, //RIM=1 [0000]
|
||||
0x000D, 0x0000, // [0000]
|
||||
0x000E, 0x0030, //VEM=3 VCOM equalize [0000]
|
||||
0x0050, 0x0000, //Display window area setting
|
||||
0x0051, 0x00EF,
|
||||
0x0052, 0x0000,
|
||||
0x0053, 0x013F,
|
||||
0x0061, 0x0001,
|
||||
0x006A, 0x0000,
|
||||
0x0080, 0x0000,
|
||||
@@ -2369,6 +2153,8 @@ case 0x4532: // thanks Leodino
|
||||
};
|
||||
init_table16(R61505V_regValues, sizeof(R61505V_regValues));
|
||||
break;
|
||||
|
||||
#if defined(SUPPORT_B509_7793)
|
||||
case 0x7793:
|
||||
case 0xB509:
|
||||
_lcd_capable = REV_SCREEN;
|
||||
@@ -2433,8 +2219,25 @@ case 0x4532: // thanks Leodino
|
||||
p16 = (int16_t *) & HEIGHT;
|
||||
*p16 = 400;
|
||||
break;
|
||||
#endif
|
||||
}
|
||||
_lcd_rev = ((_lcd_capable & REV_SCREEN) != 0);
|
||||
if (table8_ads != NULL) {
|
||||
static const uint8_t reset_off[] PROGMEM = {
|
||||
0x01, 0, //Soft Reset
|
||||
TFTLCD_DELAY8, 150, // .kbv will power up with ONLY reset, sleep out, display on
|
||||
0x28, 0, //Display Off
|
||||
0x3A, 1, 0x55, //Pixel read=565, write=565.
|
||||
};
|
||||
static const uint8_t wake_on[] PROGMEM = {
|
||||
0x11, 0, //Sleep Out
|
||||
TFTLCD_DELAY8, 150,
|
||||
0x29, 0, //Display On
|
||||
};
|
||||
init_table(&reset_off, sizeof(reset_off));
|
||||
init_table(table8_ads, table_size); //can change PIXFMT
|
||||
init_table(&wake_on, sizeof(wake_on));
|
||||
}
|
||||
setRotation(0); //PORTRAIT
|
||||
invertDisplay(false);
|
||||
}
|
||||
|
||||
@@ -1,5 +1,5 @@
|
||||
#ifndef MCUFRIEND_KBV_H_
|
||||
#define MCUFRIEND_KBV_H_ 292
|
||||
#define MCUFRIEND_KBV_H_ 293
|
||||
|
||||
//#define USE_SERIAL
|
||||
|
||||
|
||||
|
Before Width: | Height: | Size: 56 KiB After Width: | Height: | Size: 56 KiB |
|
Before Width: | Height: | Size: 225 KiB After Width: | Height: | Size: 225 KiB |
|
Before Width: | Height: | Size: 225 KiB After Width: | Height: | Size: 225 KiB |
@@ -19,37 +19,58 @@ Most of them will write some text to the Serial window (9600 baud). The BMP ex
|
||||
An Adafruit constructor(cs, rs, wr, rd, rst) IGNORES any arguments. i.e. it only uses the shield control pins
|
||||
|
||||
10. It currently supports UNO shields with "mcufriend.com" pcbs with controllers:
|
||||
----- HX8347-A 240x320 ID=0x8347 #define SUPPORT_8347A new Untested
|
||||
HX8347-A 240x320 ID=0x8347 #define SUPPORT_8347A *** Untested ***
|
||||
HX8347-D 240x320 ID=0x4747 #define SUPPORT_8347D
|
||||
HX8347-G 240x320 ID=0x7575 #define SUPPORT_8347D
|
||||
HX8347-I 240x320 ID=0x9595 #define SUPPORT_8347D
|
||||
HX8352-A 240x400 ID=0x5252 #define SUPPORT_8352A
|
||||
HX8357-D 320x480 ID=0x8357
|
||||
ILI9302 240x320 ID=0x9302
|
||||
ILI9320 240x320 ID=0x9320
|
||||
ILI9325 240x320 ID=0x9325
|
||||
ILI9326 240x400 ID=0x9326 #define SUPPORT_9326_5420
|
||||
ILI9327 240x400 ID=0x9327
|
||||
ILI9328 240x320 ID=0x9328
|
||||
ILI9329 240x320 ID=0x9329
|
||||
ILI9331 240x320 ID=0x9331
|
||||
ILI9335 240x320 ID=0x9335
|
||||
ILI9338 240x320 ID=0x9338
|
||||
ILI9341 240x320 ID=0x9341
|
||||
ILI9481 320x480 ID=0x9481
|
||||
ILI9486 320x480 ID=0x9486
|
||||
ILI9488 320x480 ID=0x9488
|
||||
LGDP4535 240x320 ID=0x4535
|
||||
RM68090 240x320 ID=0x6809
|
||||
LGDP4532 240x320 ID=0x4532 #define SUPPORT_4532
|
||||
LGDP4535 240x320 ID=0x4535 #define SUPPORT_4535
|
||||
R61505V 240x320 ID=0xB505
|
||||
R61505W 240x320 ID=0xC505 new Untested
|
||||
R61509V 240x400 ID=0xB509
|
||||
R61505W 240x320 ID=0xC505
|
||||
R61509V 240x400 ID=0xB509 #define SUPPORT_B509_7793
|
||||
R61520 240x320 ID=0x1520
|
||||
----- S6D0139 240x320 ID=0x0139 removed due to lack of tester
|
||||
S6D0154 240x320 ID=0x0154
|
||||
R61526A 240x320 ID=0x1526
|
||||
R61581 320x480 ID=0x1581
|
||||
RM68090 240x320 ID=0x6809
|
||||
RM68140 320x480 ID=0x6814 #define SUPPORT_68140
|
||||
S6D0139 240x320 ID=0x0139 #define SUPPORT_0139 *** Untested ***
|
||||
S6D0154 240x320 ID=0x0154 #define SUPPORT_0154
|
||||
SPFD5408 240x320 ID=0x5408
|
||||
SPFD5420 240x400 ID=0x5420 #define SUPPORT_9326_5420
|
||||
SSD1963 800x480 ID=0x1963
|
||||
SSD1289 240x320 ID=0x1289 #define SUPPORT_1289
|
||||
ST7781 240x320 ID=0x7783
|
||||
ST7781 240x320 ID=0x7783 #define SUPPORT_7781
|
||||
ST7789V 240x320 ID=0x7789
|
||||
ST7793 240x400 ID=0x7793 #define SUPPORT_B509_7793
|
||||
ST7796 320x480 ID=0x7796
|
||||
UNKNOWN 320x480 ID=0x1511
|
||||
UNKNOWN 240x320 ID=0x1602
|
||||
UNKNOWN 240x320 ID=0xAC11
|
||||
|
||||
11. It should run on a UNO, MEGA2560, LEONARDO, DUE, ZERO and M0-PRO.
|
||||
Most of these controllers are #define SUPPORT_xxxx by default.
|
||||
You can save Flash memory on a Uno by commenting out the macro(s).
|
||||
|
||||
11. It should run on a UNO, MEGA2560, LEONARDO, DUE, ZERO, M0-PRO,
|
||||
It also runs on NUCLEO-F103 and TEENSY3.2 with Sparkfun Adapter
|
||||
|
||||
12. These Mcufriend-style shields tend to have a resistive TouchScreen on A1, 7, A2, 6 but are not always the same rotation of direction.
|
||||
Run the diagnose_Touchpins.ino sketch to detect which pins are used
|
||||
Run the TouchScreen_Calibr_kbv.ino sketch to diagnose your model and then scale the result from TouchScreen.h methods()
|
||||
The Resistive TouchScreen does not work on the Due. It seems to be upset by sharing pins. I have discovered why.
|
||||
(You need a new Touch library.)
|
||||
@@ -1,5 +1,5 @@
|
||||
name=MCUFRIEND_kbv
|
||||
version=2.9.2-beta
|
||||
version=2.9.3-beta
|
||||
author=David Prentice
|
||||
maintainer=David Prentice
|
||||
sentence=TFT Library for 2.4, 2.8, 3.5, 3.6, 3.95 inch mcufriend UNO Shields
|
||||
|
||||
61
utility/mcufriend_keil.h
Normal file
61
utility/mcufriend_keil.h
Normal file
@@ -0,0 +1,61 @@
|
||||
#ifndef MCUFRIEND_KEIL_H_
|
||||
#define MCUFRIEND_KEIL_H_
|
||||
|
||||
#if defined(USE_SERIAL)
|
||||
#include "mcufriend_keil_spi.h"
|
||||
#else
|
||||
#include "pin_shield_1.h" //shield pin macros e.g. A2_PORT, PIN_OUTPUT()
|
||||
#include "pin_shield_8.h" //macros for write_8(), read_8(), setWriteDir(), ...
|
||||
|
||||
// control pins as used in MCUFRIEND shields
|
||||
#define RD_PORT A0_PORT
|
||||
#define RD_PIN A0_PIN
|
||||
#define WR_PORT A1_PORT
|
||||
#define WR_PIN A1_PIN
|
||||
#define CD_PORT A2_PORT
|
||||
#define CD_PIN A2_PIN
|
||||
#define CS_PORT A3_PORT
|
||||
#define CS_PIN A3_PIN
|
||||
#define RESET_PORT A4_PORT
|
||||
#define RESET_PIN A4_PIN
|
||||
|
||||
// general purpose pin macros
|
||||
#define RD_ACTIVE PIN_LOW(RD_PORT, RD_PIN)
|
||||
#define RD_IDLE PIN_HIGH(RD_PORT, RD_PIN)
|
||||
#define RD_OUTPUT PIN_OUTPUT(RD_PORT, RD_PIN)
|
||||
#define WR_ACTIVE PIN_LOW(WR_PORT, WR_PIN)
|
||||
#define WR_IDLE PIN_HIGH(WR_PORT, WR_PIN)
|
||||
#define WR_OUTPUT PIN_OUTPUT(WR_PORT, WR_PIN)
|
||||
#define CD_COMMAND PIN_LOW(CD_PORT, CD_PIN)
|
||||
#define CD_DATA PIN_HIGH(CD_PORT, CD_PIN)
|
||||
#define CD_OUTPUT PIN_OUTPUT(CD_PORT, CD_PIN)
|
||||
#define CS_ACTIVE PIN_LOW(CS_PORT, CS_PIN)
|
||||
#define CS_IDLE PIN_HIGH(CS_PORT, CS_PIN)
|
||||
#define CS_OUTPUT PIN_OUTPUT(CS_PORT, CS_PIN)
|
||||
#define RESET_ACTIVE PIN_LOW(RESET_PORT, RESET_PIN)
|
||||
#define RESET_IDLE PIN_HIGH(RESET_PORT, RESET_PIN)
|
||||
#define RESET_OUTPUT PIN_OUTPUT(RESET_PORT, RESET_PIN)
|
||||
|
||||
// General macros. IOCLR registers are 1 cycle when optimised.
|
||||
#define WR_STROBE { WR_ACTIVE; WR_IDLE; } //PWLW=TWRL=50ns
|
||||
#define RD_STROBE RD_IDLE, RD_ACTIVE, RD_ACTIVE, RD_ACTIVE //PWLR=TRDL=150ns
|
||||
#if defined(TEENSY) || defined(__ARM_ARCH_7EM__) // || defined(STM32L476xx)
|
||||
#define write8(d) { write_8(d); WR_ACTIVE; WR_ACTIVE; WR_STROBE; } // STROBEs are defined later
|
||||
// read 250ns after RD_ACTIVE goes low
|
||||
#define read8() ( RD_STROBE, RD_ACTIVE, RD_ACTIVE, RD_ACTIVE, RD_ACTIVE, RD_ACTIVE, RD_ACTIVE, read_8() )
|
||||
#else
|
||||
#define write8(d) { write_8(d); WR_STROBE; } // STROBEs are defined later
|
||||
// read 250ns after RD_ACTIVE goes low
|
||||
#define read8() ( RD_STROBE, read_8() )
|
||||
#endif
|
||||
|
||||
#define write16(x) { uint8_t h = (x)>>8, l = x; write8(h); write8(l); }
|
||||
#define READ_8(dst) { dst = read8(); RD_IDLE; }
|
||||
#define READ_16(dst) { dst = read8(); dst = (dst<<8) | read8(); RD_IDLE; }
|
||||
|
||||
#define CTL_INIT() { RD_OUTPUT; WR_OUTPUT; CD_OUTPUT; CS_OUTPUT; RESET_OUTPUT; }
|
||||
#define WriteCmd(x) { CD_COMMAND; write16(x); }
|
||||
#define WriteData(x) { CD_DATA; write16(x); }
|
||||
|
||||
#endif //!USE_SERIAL
|
||||
#endif //MCUFRIEND_KEIL_H_
|
||||
545
utility/pin_shield_1.h
Normal file
545
utility/pin_shield_1.h
Normal file
@@ -0,0 +1,545 @@
|
||||
#ifndef PIN_SHIELD_1_H_
|
||||
#define PIN_SHIELD_1_H_
|
||||
|
||||
// just provide macros for the Arduino pins
|
||||
// i.e. PIN_LOW(), PIN_HIGH(), PIN_OUTPUT(), PIN_INPUT(), PIN_READ()
|
||||
|
||||
#define LPC810 810
|
||||
#define LPC812 812
|
||||
#define LPC1343 1343
|
||||
#define LPC1768 1768
|
||||
#define LPC2103 2103
|
||||
#define LPC2148 2148
|
||||
#warning Using pin_SHIELD_1.h
|
||||
|
||||
#if 0
|
||||
|
||||
#elif defined(NUCLEO) || defined(TARGET_NUCLEO_F072RB) || defined(TARGET_NUCLEO_F401RE) || defined(TARGET_NUCLEO_F411RE) || defined(TARGET_NUCLEO_F103RB)
|
||||
#define PIN_MODE2(reg, pin, mode) reg=(reg&~(0x3<<((pin)<<1)))|(mode<<((pin)<<1))
|
||||
#if __MBED__
|
||||
#warning MBED knows everything
|
||||
#elif defined(STM32F072xB)
|
||||
#include <STM32F0XX.h>
|
||||
#elif defined(STM32F103xB)
|
||||
#if defined(__CC_ARM)
|
||||
#include <STM32F10X.h>
|
||||
#else
|
||||
#include <STM32F1XX.h>
|
||||
#endif
|
||||
#elif defined(STM32L476xx)
|
||||
#include <STM32L4XX.h>
|
||||
#elif defined(STM32F401xE) || defined(STM32F411xE)
|
||||
#include <STM32F4XX.h>
|
||||
#endif
|
||||
#define D0_PORT GPIOA
|
||||
#define D0_PIN 3
|
||||
#define D1_PORT GPIOA
|
||||
#define D1_PIN 2
|
||||
#define D2_PORT GPIOA
|
||||
#define D2_PIN 10
|
||||
#define D3_PORT GPIOB
|
||||
#define D3_PIN 3
|
||||
#define D4_PORT GPIOB
|
||||
#define D4_PIN 5
|
||||
#define D5_PORT GPIOB
|
||||
#define D5_PIN 4
|
||||
#define D6_PORT GPIOB
|
||||
#define D6_PIN 10
|
||||
#define D7_PORT GPIOA
|
||||
#define D7_PIN 8
|
||||
#define D8_PORT GPIOA
|
||||
#define D8_PIN 9
|
||||
#define D9_PORT GPIOC
|
||||
#define D9_PIN 7
|
||||
#define D10_PORT GPIOB
|
||||
#define D10_PIN 6
|
||||
#define D11_PORT GPIOA
|
||||
#define D11_PIN 7
|
||||
#define D12_PORT GPIOA
|
||||
#define D12_PIN 6
|
||||
#define D13_PORT GPIOA
|
||||
#define D13_PIN 5
|
||||
#define A0_PORT GPIOA
|
||||
#define A0_PIN 0
|
||||
#define A1_PORT GPIOA
|
||||
#define A1_PIN 1
|
||||
#define A2_PORT GPIOA
|
||||
#define A2_PIN 4
|
||||
#define A3_PORT GPIOB
|
||||
#define A3_PIN 0
|
||||
#define A4_PORT GPIOC
|
||||
#define A4_PIN 1
|
||||
#define A5_PORT GPIOC
|
||||
#define A5_PIN 0
|
||||
// Shield Control macros
|
||||
#define PIN_LOW(port, pin) (port)->BSRR = (1<<((pin)+16))
|
||||
#define PIN_HIGH(port, pin) (port)->BSRR = (1<<(pin))
|
||||
//#define PIN_LOW(port, pin) (port)->ODR &= ~(1<<(pin))
|
||||
//#define PIN_HIGH(port, pin) (port)->ODR |= (1<<(pin))
|
||||
#define PIN_READ(port, pin) (port)->IDR & (1<<(pin))
|
||||
#if defined(STM32F103xB)
|
||||
#warning STM32F103xB ******************************
|
||||
#define PIN_MODE4(reg, pin, mode) reg=(reg&~(0xF<<((pin)<<2)))|(mode<<((pin)<<2))
|
||||
#define PIN_OUTPUT(port, pin) PIN_MODE4((port)->CRL, pin, 0x3) //50MHz push-pull only 0-7
|
||||
#define PIN_INPUT(port, pin) PIN_MODE4((port)->CRL, pin, 0x4) //digital input
|
||||
#else
|
||||
#define PIN_OUTPUT(port, pin) PIN_MODE2((port)->MODER, pin, 0x1)
|
||||
#define PIN_INPUT(port, pin) PIN_MODE2((port)->MODER, pin, 0x0) //.kbv check this
|
||||
#endif
|
||||
|
||||
#elif __TARGET_PROCESSOR == LPC1768
|
||||
#include <LPC17xx.h>
|
||||
// configure macros for the control pins
|
||||
#define D0_PORT LPC_GPIO0
|
||||
#define D0_PIN 3
|
||||
#define D1_PORT LPC_GPIO0
|
||||
#define D1_PIN 2
|
||||
#define D2_PORT LPC_GPIO0
|
||||
#define D2_PIN 24 //p16
|
||||
#define D3_PORT LPC_GPIO0
|
||||
#define D3_PIN 23 //p15
|
||||
#define D4_PORT LPC_GPIO0
|
||||
#define D4_PIN 16 //p14
|
||||
#define D5_PORT LPC_GPIO0
|
||||
#define D5_PIN 15 //p13
|
||||
#define D6_PORT LPC_GPIO0
|
||||
#define D6_PIN 17 //p12
|
||||
#define D7_PORT LPC_GPIO0
|
||||
#define D7_PIN 18 //p11
|
||||
#define D8_PORT LPC_GPIO0
|
||||
#define D8_PIN 1 //p10
|
||||
#define D9_PORT LPC_GPIO0
|
||||
#define D9_PIN 0 //p9
|
||||
#define D10_PORT LPC_GPIO0
|
||||
#define D10_PIN 6 //p8
|
||||
#define D11_PORT LPC_GPIO0
|
||||
#define D11_PIN 9 //p5
|
||||
#define D12_PORT LPC_GPIO0
|
||||
#define D12_PIN 8 //p6 miso
|
||||
#define D13_PORT LPC_GPIO0
|
||||
#define D13_PIN 7 //p7
|
||||
#define A0_PORT LPC_GPIO0
|
||||
#define A0_PIN 25 //p17
|
||||
#define A1_PORT LPC_GPIO0
|
||||
#define A1_PIN 26 //p18
|
||||
#define A2_PORT LPC_GPIO1
|
||||
#define A2_PIN 30 //p19
|
||||
#define A3_PORT LPC_GPIO1
|
||||
#define A3_PIN 31 //p20
|
||||
#define A4_PORT LPC_GPIO0
|
||||
#define A4_PIN 10 //p28
|
||||
#define A5_PORT LPC_GP100
|
||||
#define A5_PIN 11 //p27
|
||||
// Shield Control macros
|
||||
#define PIN_LOW(port, pin) (port)->FIOCLR = (1u<<(pin))
|
||||
#define PIN_HIGH(port, pin) (port)->FIOSET = (1u<<(pin))
|
||||
#define PIN_OUTPUT(port, pin) (port)->FIODIR |= (1u<<(pin))
|
||||
#define PIN_INPUT(port, pin) (port)->FIODIR &= ~(1u<<(pin))
|
||||
#define PIN_READ(port, pin) (port)->FIOPIN & (1u<<(pin))
|
||||
|
||||
#elif defined(MK20D7) && defined(TEENSY)
|
||||
#include <MK20D5.h>
|
||||
#define D0_PORT PTB
|
||||
#define D0_PIN 16
|
||||
#define D1_PORT PTB
|
||||
#define D1_PIN 17
|
||||
#define D2_PORT PTD
|
||||
#define D2_PIN 0
|
||||
#define D3_PORT PTA
|
||||
#define D3_PIN 12
|
||||
#define D4_PORT PTA
|
||||
#define D4_PIN 13
|
||||
#define D5_PORT PTD
|
||||
#define D5_PIN 7
|
||||
#define D6_PORT PTD
|
||||
#define D6_PIN 4
|
||||
#define D7_PORT PTD
|
||||
#define D7_PIN 2
|
||||
#define D8_PORT PTD
|
||||
#define D8_PIN 3
|
||||
#define D9_PORT PTC
|
||||
#define D9_PIN 3
|
||||
#define D10_PORT PTC
|
||||
#define D10_PIN 4
|
||||
#define D11_PORT PTC
|
||||
#define D11_PIN 6
|
||||
#define D12_PORT PTC
|
||||
#define D12_PIN 7
|
||||
#define D13_PORT PTC
|
||||
#define D13_PIN 5
|
||||
#define A0_PORT PTD
|
||||
#define A0_PIN 1
|
||||
#define A1_PORT PTC
|
||||
#define A1_PIN 0
|
||||
#define A2_PORT PTB
|
||||
#define A2_PIN 0
|
||||
#define A3_PORT PTB
|
||||
#define A3_PIN 1
|
||||
#define A4_PORT PTB
|
||||
#define A4_PIN 3
|
||||
#define A5_PORT PTB
|
||||
#define A5_PIN 2
|
||||
// Shield Control macros. Deliberately avoid the IOSET registers
|
||||
#define PIN_LOW(port, pin) (port)->PCOR = (1<<(pin))
|
||||
#define PIN_HIGH(port, pin) (port)->PSOR = (1<<(pin))
|
||||
//#define PIN_LOW(port, pin) (port)->PDOR &= ~(1<<(pin))
|
||||
//#define PIN_HIGH(port, pin) (port)->PDOR |= (1<<(pin))
|
||||
#define PIN_OUTPUT(port, pin) (port)->PDDR |= (1<<(pin))
|
||||
#define PIN_INPUT(port, pin) (port)->PDDR &= ~(1u<<(pin))
|
||||
#define PIN_READ(port, pin) (port)->PDIR & (1u<<(pin))
|
||||
|
||||
|
||||
#elif defined(MKL25Z4) || defined(TARGET_KL25Z)
|
||||
#include <MKL25Z4.h>
|
||||
#define D0_PORT PTA
|
||||
#define D0_PIN 1
|
||||
#define D1_PORT PTA
|
||||
#define D1_PIN 2
|
||||
#define D2_PORT PTD
|
||||
#define D2_PIN 4
|
||||
#define D3_PORT PTA
|
||||
#define D3_PIN 12
|
||||
#define D4_PORT PTA
|
||||
#define D4_PIN 4
|
||||
#define D5_PORT PTA
|
||||
#define D5_PIN 5
|
||||
#define D6_PORT PTC
|
||||
#define D6_PIN 8
|
||||
#define D7_PORT PTC
|
||||
#define D7_PIN 9
|
||||
#define D8_PORT PTA
|
||||
#define D8_PIN 13
|
||||
#define D9_PORT PTD
|
||||
#define D9_PIN 5
|
||||
#define D10_PORT PTD
|
||||
#define D10_PIN 0
|
||||
#define D11_PORT PTD
|
||||
#define D11_PIN 2
|
||||
#define D12_PORT PTD
|
||||
#define D12_PIN 3
|
||||
#define D13_PORT PTD
|
||||
#define D13_PIN 1
|
||||
#define A0_PORT PTB
|
||||
#define A0_PIN 0
|
||||
#define A1_PORT PTB
|
||||
#define A1_PIN 1
|
||||
#define A2_PORT PTB
|
||||
#define A2_PIN 2
|
||||
#define A3_PORT PTB
|
||||
#define A3_PIN 3
|
||||
#define A4_PORT PTC
|
||||
#define A4_PIN 2
|
||||
#define A5_PORT PTC
|
||||
#define A5_PIN 1
|
||||
// Shield Control macros. Deliberately avoid the IOSET registers
|
||||
#define PIN_LOW(port, pin) (port)->PCOR = (1<<(pin))
|
||||
#define PIN_HIGH(port, pin) (port)->PSOR = (1<<(pin))
|
||||
//#define PIN_LOW(port, pin) (port)->PDOR &= ~(1<<(pin))
|
||||
//#define PIN_HIGH(port, pin) (port)->PDOR |= (1<<(pin))
|
||||
#define PIN_OUTPUT(port, pin) (port)->PDDR |= (1<<(pin))
|
||||
#define PIN_INPUT(port, pin) (port)->PDDR &= ~(1u<<(pin))
|
||||
#define PIN_READ(port, pin) (port)->PDIR & (1u<<(pin))
|
||||
|
||||
#elif defined(MKL05Z4)
|
||||
#include <MKL05Z4.h>
|
||||
#define D0_PORT PTB
|
||||
#define D0_PIN 2
|
||||
#define D1_PORT PTB
|
||||
#define D1_PIN 1
|
||||
#define D2_PORT PTA
|
||||
#define D2_PIN 11
|
||||
#define D3_PORT PTB
|
||||
#define D3_PIN 5
|
||||
#define D4_PORT PTA
|
||||
#define D4_PIN 10
|
||||
#define D5_PORT PTA
|
||||
#define D5_PIN 12
|
||||
#define D6_PORT PTB
|
||||
#define D6_PIN 6
|
||||
#define D7_PORT PTB
|
||||
#define D7_PIN 7
|
||||
#define D8_PORT PTB
|
||||
#define D8_PIN 13
|
||||
#define D9_PORT PTB
|
||||
#define D9_PIN 5
|
||||
#define D10_PORT PTA
|
||||
#define D10_PIN 0
|
||||
#define D11_PORT PTA
|
||||
#define D11_PIN 2
|
||||
#define D12_PORT PTA
|
||||
#define D12_PIN 3
|
||||
#define D13_PORT PTB
|
||||
#define D13_PIN 1
|
||||
#define A0_PORT PTB
|
||||
#define A0_PIN 8
|
||||
#define A1_PORT PTB
|
||||
#define A1_PIN 9
|
||||
#define A2_PORT PTA
|
||||
#define A2_PIN 8
|
||||
#define A3_PORT PTA
|
||||
#define A3_PIN 0
|
||||
#define A4_PORT PTA
|
||||
#define A4_PIN 9
|
||||
#define A5_PORT PTB
|
||||
#define A5_PIN 13
|
||||
// Shield Control macros
|
||||
//#define PIN_LOW(port, pin) (port)->PCOR = (1<<(pin))
|
||||
//#define PIN_HIGH(port, pin) (port)->PSOR = (1<<(pin))
|
||||
#define PIN_LOW(port, pin) (port)->PDOR &= ~(1<<(pin))
|
||||
#define PIN_HIGH(port, pin) (port)->PDOR |= (1<<(pin))
|
||||
#define PIN_OUTPUT(port, pin) (port)->PDDR |= (1<<(pin))
|
||||
#define PIN_INPUT(port, pin) (port)->PDDR &= ~(1u<<(pin))
|
||||
#define PIN_READ(port, pin) (port)->PDIR & (1u<<(pin))
|
||||
|
||||
#elif defined(MK20D5) || defined(TARGET_K20D50M)
|
||||
#include <MK20D5.h>
|
||||
#define D0_PORT PTE
|
||||
#define D0_PIN 1
|
||||
#define D1_PORT PTE
|
||||
#define D1_PIN 0
|
||||
#define D2_PORT PTA
|
||||
#define D2_PIN 5
|
||||
#define D3_PORT PTD
|
||||
#define D3_PIN 4
|
||||
#define D4_PORT PTC
|
||||
#define D4_PIN 8
|
||||
#define D5_PORT PTA
|
||||
#define D5_PIN 1
|
||||
#define D6_PORT PTC
|
||||
#define D6_PIN 3
|
||||
#define D7_PORT PTC
|
||||
#define D7_PIN 4
|
||||
#define D8_PORT PTA
|
||||
#define D8_PIN 13
|
||||
#define D9_PORT PTA
|
||||
#define D9_PIN 5
|
||||
#define D10_PORT PTC
|
||||
#define D10_PIN 0
|
||||
#define D11_PORT PTD
|
||||
#define D11_PIN 2
|
||||
#define D12_PORT PTD
|
||||
#define D12_PIN 3
|
||||
#define D13_PORT PTD
|
||||
#define D13_PIN 1
|
||||
#define A0_PORT PTC
|
||||
#define A0_PIN 0
|
||||
#define A1_PORT PTC
|
||||
#define A1_PIN 1
|
||||
#define A2_PORT PTD
|
||||
#define A2_PIN 6
|
||||
#define A3_PORT PTD
|
||||
#define A3_PIN 5
|
||||
#define A4_PORT PTB
|
||||
#define A4_PIN 1
|
||||
#define A5_PORT PTB
|
||||
#define A5_PIN 0
|
||||
// Shield Control macros. Deliberately avoid the IOSET registers
|
||||
#define PIN_LOW(port, pin) (port)->PCOR = (1<<(pin))
|
||||
#define PIN_HIGH(port, pin) (port)->PSOR = (1<<(pin))
|
||||
//#define PIN_LOW(port, pin) (port)->PDOR &= ~(1<<(pin))
|
||||
//#define PIN_HIGH(port, pin) (port)->PDOR |= (1<<(pin))
|
||||
#define PIN_OUTPUT(port, pin) (port)->PDDR |= (1<<(pin))
|
||||
#define PIN_INPUT(port, pin) (port)->PDDR &= ~(1u<<(pin))
|
||||
#define PIN_READ(port, pin) (port)->PDIR & (1u<<(pin))
|
||||
|
||||
|
||||
#elif defined(ZERO)
|
||||
#include <samd21.h>
|
||||
// configure macros for the data pins
|
||||
#if defined(D21_XPRO)
|
||||
#define D0_PORT PORT->Group[1]
|
||||
#define D0_PIN 9
|
||||
#define D1_PORT PORT->Group[1]
|
||||
#define D1_PIN 8
|
||||
#define D2_PORT PORT->Group[1]
|
||||
#define D2_PIN 14
|
||||
#define D3_PORT PORT->Group[1]
|
||||
#define D3_PIN 2
|
||||
#define D4_PORT PORT->Group[1]
|
||||
#define D4_PIN 5
|
||||
#define D5_PORT PORT->Group[0]
|
||||
#define D5_PIN 21
|
||||
#define D6_PORT PORT->Group[1]
|
||||
#define D6_PIN 15
|
||||
#define D7_PORT PORT->Group[0]
|
||||
#define D7_PIN 17
|
||||
#define D8_PORT PORT->Group[1]
|
||||
#define D8_PIN 6
|
||||
#define D9_PORT PORT->Group[1]
|
||||
#define D9_PIN 7
|
||||
#define D10_PORT PORT->Group[0]
|
||||
#define D10_PIN 5
|
||||
#define D11_PORT PORT->Group[0]
|
||||
#define D11_PIN 6
|
||||
#define D12_PORT PORT->Group[0]
|
||||
#define D12_PIN 4
|
||||
#define D13_PORT PORT->Group[0]
|
||||
#define D13_PIN 7
|
||||
#define A0_PORT PORT->Group[1]
|
||||
#define A0_PIN 0
|
||||
#define A1_PORT PORT->Group[1]
|
||||
#define A1_PIN 1
|
||||
#define A2_PORT PORT->Group[0]
|
||||
#define A2_PIN 10
|
||||
#define A3_PORT PORT->Group[0]
|
||||
#define A3_PIN 11
|
||||
#define A4_PORT PORT->Group[0]
|
||||
#define A4_PIN 8
|
||||
#define A5_PORT PORT->Group[0]
|
||||
#define A5_PIN 9
|
||||
#elif defined(M0_PRO)
|
||||
#define D0_PORT PORT->Group[0]
|
||||
#define D0_PIN 11
|
||||
#define D1_PORT PORT->Group[0]
|
||||
#define D1_PIN 10
|
||||
#define D2_PORT PORT->Group[0]
|
||||
#define D2_PIN 8
|
||||
#define D3_PORT PORT->Group[0]
|
||||
#define D3_PIN 9
|
||||
#define D4_PORT PORT->Group[0]
|
||||
#define D4_PIN 14
|
||||
#define D5_PORT PORT->Group[0]
|
||||
#define D5_PIN 15
|
||||
#define D6_PORT PORT->Group[0]
|
||||
#define D6_PIN 20
|
||||
#define D7_PORT PORT->Group[0]
|
||||
#define D7_PIN 21
|
||||
#define D8_PORT PORT->Group[0]
|
||||
#define D8_PIN 6
|
||||
#define D9_PORT PORT->Group[0]
|
||||
#define D9_PIN 7
|
||||
#define D10_PORT PORT->Group[0]
|
||||
#define D10_PIN 18
|
||||
#define D11_PORT PORT->Group[0]
|
||||
#define D11_PIN 16
|
||||
#define D12_PORT PORT->Group[0]
|
||||
#define D12_PIN 19
|
||||
#define D13_PORT PORT->Group[0]
|
||||
#define D13_PIN 17
|
||||
#define A0_PORT PORT->Group[0]
|
||||
#define A0_PIN 2
|
||||
#define A1_PORT PORT->Group[1]
|
||||
#define A1_PIN 8
|
||||
#define A2_PORT PORT->Group[1]
|
||||
#define A2_PIN 9
|
||||
#define A3_PORT PORT->Group[0]
|
||||
#define A3_PIN 4
|
||||
#define A4_PORT PORT->Group[0]
|
||||
#define A4_PIN 5
|
||||
#define A5_PORT PORT->Group[1]
|
||||
#define A5_PIN 2
|
||||
|
||||
#endif
|
||||
// Shield Control macros.
|
||||
#define PIN_LOW(port, pin) (port).OUTCLR.reg = (1<<(pin))
|
||||
#define PIN_HIGH(port, pin) (port).OUTSET.reg = (1<<(pin))
|
||||
#define PIN_OUTPUT(port, pin) (port).DIR.reg |= (1<<(pin))
|
||||
#define PIN_INPUT(port, pin) (port).DIR.reg &= ~(1u<<(pin))
|
||||
#define PIN_READ(port, pin) (port).IN.reg & (1u<<(pin))
|
||||
|
||||
|
||||
#elif defined(__AVR_ATxmegaA4U__)
|
||||
#include <avr/io.h>
|
||||
// PD6, PD7 is used for USB. I could have used PORTA for bus, PORTC for MSPI, SPI and remap
|
||||
#define D0_PORT PORTE
|
||||
#define D0_PIN 2
|
||||
#define D1_PORT PORTE
|
||||
#define D1_PIN 3
|
||||
#define D2_PORT PORTC
|
||||
#define D2_PIN 2
|
||||
#define D3_PORT PORTC
|
||||
#define D3_PIN 3
|
||||
#define D4_PORT PORTC
|
||||
#define D4_PIN 4
|
||||
#define D5_PORT PORTC
|
||||
#define D5_PIN 5
|
||||
#define D6_PORT PORTC
|
||||
#define D6_PIN 6
|
||||
#define D7_PORT PORTC
|
||||
#define D7_PIN 7
|
||||
#define D8_PORT PORTC
|
||||
#define D8_PIN 0
|
||||
#define D9_PORT PORTC
|
||||
#define D9_PIN 1
|
||||
#define D10_PORT PORTD
|
||||
#define D10_PIN 0
|
||||
#define D11_PORT PORTD
|
||||
#define D11_PIN 3
|
||||
#define D12_PORT PORTD
|
||||
#define D12_PIN 2
|
||||
#define D13_PORT PORTD
|
||||
#define D13_PIN 1
|
||||
#define A0_PORT PORTB
|
||||
#define A0_PIN 0
|
||||
#define A1_PORT PORTB
|
||||
#define A1_PIN 1
|
||||
#define A2_PORT PORTB
|
||||
#define A2_PIN 2
|
||||
#define A3_PORT PORTB
|
||||
#define A3_PIN 3
|
||||
#define A4_PORT PORTE
|
||||
#define A4_PIN 0
|
||||
#define A5_PORT PORTE
|
||||
#define A5_PIN 1
|
||||
// Shield Control macros.
|
||||
#define PIN_LOW(port, pin) (port).OUTCLR.reg = (1<<(pin))
|
||||
#define PIN_HIGH(port, pin) (port).OUTSET.reg = (1<<(pin))
|
||||
#define PIN_OUTPUT(port, pin) (port).DIR.reg |= (1<<(pin))
|
||||
#define PIN_INPUT(port, pin) (port).DIR.reg &= ~(1u<<(pin))
|
||||
#define PIN_READ(port, pin) (port).IN.reg & (1u<<(pin))
|
||||
|
||||
|
||||
#elif defined(__AVR_ATtiny1634__)
|
||||
#include <avr/io.h>
|
||||
//
|
||||
#define D0_PORT PORTA
|
||||
#define D0_PIN 7
|
||||
#define D1_PORT PORTB
|
||||
#define D1_PIN 0
|
||||
#define D2_PORT PORTA
|
||||
#define D2_PIN 0
|
||||
#define D3_PORT PORTA
|
||||
#define D3_PIN 3
|
||||
#define D4_PORT PORTA
|
||||
#define D4_PIN 4
|
||||
#define D5_PORT PORTB
|
||||
#define D5_PIN 3
|
||||
#define D6_PORT PORTA
|
||||
#define D6_PIN 1
|
||||
#define D7_PORT PORTA
|
||||
#define D7_PIN 0
|
||||
#define D8_PORT PORTA
|
||||
#define D8_PIN 2
|
||||
#define D9_PORT PORTB
|
||||
#define D9_PIN 2
|
||||
#define D10_PORT PORTA
|
||||
#define D10_PIN 6
|
||||
#define D11_PORT PORTB
|
||||
#define D11_PIN 2
|
||||
#define D12_PORT PORTB
|
||||
#define D12_PIN 1
|
||||
#define D13_PORT PORTC
|
||||
#define D13_PIN 1
|
||||
#define A0_PORT PORTB
|
||||
#define A0_PIN 3
|
||||
#define A1_PORT PORTC
|
||||
#define A1_PIN 0
|
||||
#define A2_PORT PORTA
|
||||
#define A2_PIN 5
|
||||
#define A3_PORT PORTB
|
||||
#define A3_PIN 2
|
||||
#define A4_PORT PORTB
|
||||
#define A4_PIN 1
|
||||
#define A5_PORT PORTC
|
||||
#define A5_PIN 1
|
||||
#else
|
||||
#error MCU unselected
|
||||
#endif // MCUs
|
||||
|
||||
#endif //PIN_SHIELD_1_H
|
||||
#if 0
|
||||
#if defined(M0_PRO)
|
||||
#endif
|
||||
#if defined(D21_XPRO)
|
||||
#endif
|
||||
#endif
|
||||
286
utility/pin_shield_8.h
Normal file
286
utility/pin_shield_8.h
Normal file
@@ -0,0 +1,286 @@
|
||||
#ifndef PIN_SHIELD_8_H_
|
||||
#define PIN_SHIELD_8_H_
|
||||
|
||||
// just provide macros for the 8-bit data bus
|
||||
// i.e. write_8(), read_8(), setWriteDir(), setReadDir()
|
||||
|
||||
|
||||
#define LPC810 810
|
||||
#define LPC812 812
|
||||
#define LPC1343 1343
|
||||
#define LPC1768 1768
|
||||
#define LPC2103 2103
|
||||
#define LPC2148 2148
|
||||
#warning Using pin_SHIELD_8.h
|
||||
|
||||
#if 0
|
||||
|
||||
#elif defined(NUCLEO) || defined(TARGET_NUCLEO_F072RB) || defined(TARGET_NUCLEO_F401RE) || defined(TARGET_NUCLEO_F411RE) || defined(TARGET_NUCLEO_F103RB)
|
||||
#if __MBED__
|
||||
#warning MBED knows everything
|
||||
#elif defined(STM32F072xB)
|
||||
#include <STM32F0XX.h>
|
||||
#elif defined(STM32F103xB)
|
||||
#if defined(__CC_ARM)
|
||||
#include <STM32F10X.h>
|
||||
#else
|
||||
#include <STM32F1XX.h>
|
||||
#endif
|
||||
#elif defined(STM32L476xx)
|
||||
#include <STM32L4XX.h>
|
||||
#elif defined(STM32F401xE) || defined(STM32F411xE)
|
||||
#include <STM32F4XX.h>
|
||||
#endif
|
||||
// configure macros for the data pins. -00=10.06, -O1=7.85, -O1t=7.21, -O2=7.87, -O3=7.45, -O3t=7.03
|
||||
#define write_8(d) { \
|
||||
GPIOA->BSRR = 0x0700 << 16; \
|
||||
GPIOB->BSRR = 0x0438 << 16; \
|
||||
GPIOC->BSRR = 0x0080 << 16; \
|
||||
GPIOA->BSRR = (((d) & (1<<0)) << 9) \
|
||||
| (((d) & (1<<2)) << 8) \
|
||||
| (((d) & (1<<7)) << 1); \
|
||||
GPIOB->BSRR = (((d) & (1<<3)) << 0) \
|
||||
| (((d) & (1<<4)) << 1) \
|
||||
| (((d) & (1<<5)) >> 1) \
|
||||
| (((d) & (1<<6)) << 4); \
|
||||
GPIOC->BSRR = (((d) & (1<<1)) << 6); \
|
||||
}
|
||||
#define read_8() ( (((GPIOA->IDR & (1<<9)) >> 9) \
|
||||
| ((GPIOC->IDR & (1<<7)) >> 6) \
|
||||
| ((GPIOA->IDR & (1<<10)) >> 8) \
|
||||
| ((GPIOB->IDR & (1<<3)) >> 0) \
|
||||
| ((GPIOB->IDR & (1<<5)) >> 1) \
|
||||
| ((GPIOB->IDR & (1<<4)) << 1) \
|
||||
| ((GPIOB->IDR & (1<<10)) >> 4) \
|
||||
| ((GPIOA->IDR & (1<<8)) >> 1)))
|
||||
// be wise to clear both MODER bits properly.
|
||||
#if defined(STM32F103xB)
|
||||
#define GROUP_MODE(port, reg, mask, val) {port->reg = (port->reg & ~(mask)) | ((mask)&(val)); }
|
||||
#define GP_OUT(port, reg, mask) GROUP_MODE(port, reg, mask, 0x33333333)
|
||||
#define GP_INP(port, reg, mask) GROUP_MODE(port, reg, mask, 0x44444444)
|
||||
// PA10,PA9,PA8 PB10 PB5,PB4,PB3 PC7
|
||||
#define setWriteDir() {GP_OUT(GPIOA, CRH, 0xFFF); GP_OUT(GPIOB, CRH, 0xF00); GP_OUT(GPIOB, CRL, 0xFFF000); GP_OUT(GPIOC, CRL, 0xF0000000); }
|
||||
#define setReadDir() {GP_INP(GPIOA, CRH, 0xFFF); GP_INP(GPIOB, CRH, 0xF00); GP_INP(GPIOB, CRL, 0xFFF000); GP_INP(GPIOC, CRL, 0xF0000000); }
|
||||
#else
|
||||
#define setWriteDir() { setReadDir(); \
|
||||
GPIOA->MODER |= 0x150000; GPIOB->MODER |= 0x100540; GPIOC->MODER |= 0x4000; }
|
||||
#define setReadDir() { GPIOA->MODER &= ~0x3F0000; GPIOB->MODER &= ~0x300FC0; GPIOC->MODER &= ~0xC000; }
|
||||
#endif
|
||||
|
||||
|
||||
#elif __TARGET_PROCESSOR == LPC1768
|
||||
#include <LPC17xx.h>
|
||||
// configure macros for the data pins
|
||||
#define write_8(d) { \
|
||||
LPC_GPIO0->FIOPIN = (LPC_GPIO0->FIOPIN & ~0x01878003) \
|
||||
| (((d) & (1<<0)) << 1) \
|
||||
| (((d) & (1<<1)) >> 1) \
|
||||
| (((d) & (1<<2)) << 22) \
|
||||
| (((d) & (1<<3)) << 20) \
|
||||
| (((d) & (1<<4)) << 12) \
|
||||
| (((d) & (1<<5)) << 10) \
|
||||
| (((d) & (1<<6)) << 11) \
|
||||
| (((d) & (1<<7)) << 11); \
|
||||
}
|
||||
#define read_8() ( (((LPC_GPIO0->FIOPIN & (1<<1)) >> 1) \
|
||||
| ((LPC_GPIO0->FIOPIN & (1<<0)) << 1) \
|
||||
| ((LPC_GPIO0->FIOPIN & (1<<24)) >> 22) \
|
||||
| ((LPC_GPIO0->FIOPIN & (1<<23)) >> 20) \
|
||||
| ((LPC_GPIO0->FIOPIN & (1<<16)) >> 12) \
|
||||
| ((LPC_GPIO0->FIOPIN & (1<<15)) >> 10) \
|
||||
| ((LPC_GPIO0->FIOPIN & (1<<17)) >> 11) \
|
||||
| ((LPC_GPIO0->FIOPIN & (1<<18)) >> 11)))
|
||||
#define setWriteDir() {LPC_GPIO0->FIODIR |= 0x01878003; }
|
||||
#define setReadDir() {LPC_GPIO0->FIODIR &= ~0x01878003; }
|
||||
|
||||
|
||||
#elif defined(MKL25Z4) || defined(TARGET_KL25Z)
|
||||
#include <MKL25Z4.h>
|
||||
// configure macros for the data pins
|
||||
#if 1
|
||||
#define AMASK ((1<<13)|(1<<12)|(1<<5)|(1<<4))
|
||||
#define CMASK ((1<<9)|(1<<8))
|
||||
#define DMASK ((1<<5)|(1<<4))
|
||||
#define write_8(d) { \
|
||||
PTA->PCOR = AMASK; PTC->PCOR = CMASK; PTD->PCOR = DMASK; \
|
||||
PTA->PSOR = (((d) & (1<<0)) << 13) \
|
||||
| (((d) & (1<<3)) << 9) \
|
||||
| (((d) & (1<<4)) >> 0) \
|
||||
| (((d) & (1<<5)) >> 0); \
|
||||
PTC->PSOR = (((d) & (1<<6)) << 2) \
|
||||
| (((d) & (1<<7)) << 2); \
|
||||
PTD->PSOR = (((d) & (1<<1)) << 4) \
|
||||
| (((d) & (1<<2)) << 2); \
|
||||
}
|
||||
#define read_8() ( (((PTA->PDIR & (1<<13)) >> 13) \
|
||||
| ((PTA->PDIR & (1<<12)) >> 9) \
|
||||
| ((PTA->PDIR & (3<<4)) >> 0) \
|
||||
| ((PTC->PDIR & (3<<8)) >> 2) \
|
||||
| ((PTD->PDIR & (1<<4)) >> 2) \
|
||||
| ((PTD->PDIR & (1<<5)) >> 4)))
|
||||
#define setWriteDir() {PTA->PDDR |= AMASK;PTC->PDDR |= CMASK;PTD->PDDR |= DMASK; }
|
||||
#define setReadDir() {PTA->PDDR &= ~AMASK;PTC->PDDR &= ~CMASK;PTD->PDDR &= ~DMASK; }
|
||||
#else
|
||||
#define write_8(d) { \
|
||||
PTA->PDOR = (PTA->PDOR & ~0x3030) \
|
||||
| (((d) & (1<<0)) << 13) \
|
||||
| (((d) & (1<<3)) << 9) \
|
||||
| (((d) & (3<<4)) << 0); \
|
||||
PTC->PDOR = (PTC->PDOR & ~0x0300) \
|
||||
| (((d) & (3<<6)) << 2); \
|
||||
PTD->PDOR = (PTD->PDOR & ~0x0030) \
|
||||
| (((d) & (1<<1)) << 4) \
|
||||
| (((d) & (1<<2)) << 2); \
|
||||
}
|
||||
#define read_8() ( (((PTA->PDIR & (1<<13)) >> 13) \
|
||||
| ((PTA->PDIR & (1<<12)) >> 9) \
|
||||
| ((PTA->PDIR & (3<<4)) >> 0) \
|
||||
| ((PTC->PDIR & (3<<8)) >> 2) \
|
||||
| ((PTD->PDIR & (1<<4)) >> 2) \
|
||||
| ((PTD->PDIR & (1<<5)) >> 4)))
|
||||
#define setWriteDir() {PTA->PDDR |= 0x3030;PTC->PDDR |= 0x0300;PTD->PDDR |= 0x0030; }
|
||||
#define setReadDir() {PTA->PDDR &= ~0x3030;PTC->PDDR &= ~0x0300;PTD->PDDR &= ~0x0030; }
|
||||
#endif
|
||||
|
||||
#elif defined(MKL05Z4) || defined(TARGET_KL05Z)
|
||||
#include <MKL05Z4.h>
|
||||
// configure macros for the data pins
|
||||
#define write_8(d) { \
|
||||
PTA->PDOR = (PTA->PDOR & ~0x1C00) \
|
||||
| (((d) & (1<<2)) << 9) \
|
||||
| (((d) & (1<<4)) << 6) \
|
||||
| (((d) & (1<<5)) << 7); \
|
||||
PTB->PDOR = (PTB->PDOR & ~0x0CE0) \
|
||||
| (((d) & (3<<0)) << 10) \
|
||||
| (((d) & (1<<3)) << 2) \
|
||||
| (((d) & (3<<6)) << 0); \
|
||||
}
|
||||
#define read_8() ( (((PTA->PDIR & (1<<11)) >> 9) \
|
||||
| ((PTA->PDIR & (1<<10)) >> 6) \
|
||||
| ((PTA->PDIR & (1<<12)) >> 7) \
|
||||
| ((PTB->PDIR & (3<<10)) >> 10) \
|
||||
| ((PTB->PDIR & (1<<5)) >> 2) \
|
||||
| ((PTB->PDIR & (3<<6)) >> 0)))
|
||||
#define setWriteDir() { PTA->PDDR |= 0x1C00; PTB->PDDR |= 0x0CE0; }
|
||||
#define setReadDir() { PTA->PDDR &= ~0x1C00; PTB->PDDR &= ~0x0CE0; }
|
||||
|
||||
|
||||
#elif defined(MK20D7) && defined(TEENSY)
|
||||
#include <MK20D5.h>
|
||||
// configure macros for the data pins
|
||||
#define AMASK ((1<<12)|(1<<13))
|
||||
#define CMASK ((1<<3))
|
||||
#define DMASK ((1<<0)|(1<<2)|(1<<3)|(1<<4)|(1<<7))
|
||||
|
||||
#define write_8(d) { \
|
||||
PTA->PCOR = AMASK; PTC->PCOR = CMASK; PTD->PCOR = DMASK; \
|
||||
PTA->PSOR = (((d) & (1<<3)) << 9) \
|
||||
| (((d) & (1<<4)) << 9); \
|
||||
PTC->PSOR = (((d) & (1<<1)) << 2); \
|
||||
PTD->PSOR = (((d) & (1<<0)) << 3) \
|
||||
| (((d) & (1<<2)) >> 2) \
|
||||
| (((d) & (1<<5)) << 2) \
|
||||
| (((d) & (1<<6)) >> 2) \
|
||||
| (((d) & (1<<7)) >> 5); \
|
||||
}
|
||||
#define read_8() ( (((PTD->PDIR & (1<<3)) >> 3) \
|
||||
| ((PTC->PDIR & (1<<3)) >> 2) \
|
||||
| ((PTD->PDIR & (1<<0)) << 2) \
|
||||
| ((PTA->PDIR & (1<<12)) >> 9) \
|
||||
| ((PTA->PDIR & (1<<13)) >> 9) \
|
||||
| ((PTD->PDIR & (1<<7)) >> 2) \
|
||||
| ((PTD->PDIR & (1<<4)) << 2) \
|
||||
| ((PTD->PDIR & (1<<2)) << 5)))
|
||||
#define setWriteDir() {PTA->PDDR |= AMASK;PTC->PDDR |= CMASK;PTD->PDDR |= DMASK; }
|
||||
#define setReadDir() {PTA->PDDR &= ~AMASK;PTC->PDDR &= ~CMASK;PTD->PDDR &= ~DMASK; }
|
||||
|
||||
#elif defined(MK20D5) || defined(TARGET_K20D50M)
|
||||
#include <MK20D5.h>
|
||||
// configure macros for the data pins
|
||||
#define AMASK ((1<<12)|(1<<5)|(1<<2)|(1<<1))
|
||||
#define CMASK ((1<<8)|(1<<4)|(1<<3))
|
||||
#define DMASK ((1<<4))
|
||||
#define write_8(d) { \
|
||||
PTA->PCOR = AMASK; PTC->PCOR = CMASK; PTD->PCOR = DMASK; \
|
||||
PTA->PSOR = (((d) & (1<<0)) << 12) \
|
||||
| (((d) & (1<<1)) << 1) \
|
||||
| (((d) & (1<<2)) << 3) \
|
||||
| (((d) & (1<<5)) >> 4); \
|
||||
PTC->PSOR = (((d) & (1<<4)) << 4) \
|
||||
| (((d) & (3<<6)) >> 3); \
|
||||
PTD->PSOR = (((d) & (1<<3)) << 1); \
|
||||
}
|
||||
#define read_8() ( (((PTA->PDIR & (1<<5)) >> 3) \
|
||||
| ((PTA->PDIR & (1<<1)) << 4) \
|
||||
| ((PTA->PDIR & (1<<12)) >> 12) \
|
||||
| ((PTA->PDIR & (1<<2)) >> 1) \
|
||||
| ((PTC->PDIR & (1<<8)) >> 4) \
|
||||
| ((PTC->PDIR & (3<<3)) << 3) \
|
||||
| ((PTD->PDIR & (1<<4)) >> 1)))
|
||||
#define setWriteDir() {PTA->PDDR |= AMASK;PTC->PDDR |= CMASK;PTD->PDDR |= DMASK; }
|
||||
#define setReadDir() {PTA->PDDR &= ~AMASK;PTC->PDDR &= ~CMASK;PTD->PDDR &= ~DMASK; }
|
||||
|
||||
#elif defined(ZERO)
|
||||
#include <samd21.h>
|
||||
|
||||
#ifndef PORTA
|
||||
#define PORTA PORT->Group[0]
|
||||
#define PORTB PORT->Group[1]
|
||||
#endif
|
||||
// configure macros for the data pins
|
||||
#if defined(D21_XPRO)
|
||||
#define AMASK 0x00220000
|
||||
#define BMASK 0x0000C0E4
|
||||
#define write_8(d) { \
|
||||
PORTA.OUT.reg = (PORTA.OUT.reg & ~AMASK) \
|
||||
| (((d) & (1<<5)) << 16) \
|
||||
| (((d) & (1<<7)) << 10); \
|
||||
PORTB.OUT.reg = (PORTB.OUT.reg & ~BMASK) \
|
||||
| (((d) & (3<<0)) << 6) \
|
||||
| (((d) & (1<<2)) << 12) \
|
||||
| (((d) & (1<<3)) >> 1) \
|
||||
| (((d) & (1<<4)) << 1) \
|
||||
| (((d) & (1<<6)) << 9); \
|
||||
}
|
||||
#define read_8() ( (((PORTA.IN.reg & (1<<21)) >> 16) \
|
||||
| ((PORTA.IN.reg & (1<<17)) >> 10) \
|
||||
| ((PORTB.IN.reg & (3<<6)) >> 6) \
|
||||
| ((PORTB.IN.reg & (1<<14)) >> 12) \
|
||||
| ((PORTB.IN.reg & (1<<2)) << 1) \
|
||||
| ((PORTB.IN.reg & (1<<5)) >> 1) \
|
||||
| ((PORTB.IN.reg & (1<<15)) >> 9)))
|
||||
#define setWriteDir() { \
|
||||
PORTA.DIRSET.reg = AMASK; \
|
||||
PORTB.DIRSET.reg = BMASK; \
|
||||
PORTA.WRCONFIG.reg = (AMASK>>16) | (0<<22) | (0<<28) | (1<<30) | (1<<31); \
|
||||
PORTB.WRCONFIG.reg = (BMASK & 0xFFFF) | (0<<22) | (0<<28) | (1<<30); \
|
||||
}
|
||||
#define setReadDir() { \
|
||||
PORTA.DIRCLR.reg = AMASK; \
|
||||
PORTB.DIRCLR.reg = BMASK; \
|
||||
PORTA.WRCONFIG.reg = (AMASK>>16) | (1<<17) | (0<<28) | (1<<30) | (1<<31); \
|
||||
PORTB.WRCONFIG.reg = (BMASK & 0xFFFF) | (1<<17) | (0<<28) | (1<<30); \
|
||||
}
|
||||
#else
|
||||
#define DMASK 0x0030C3C0
|
||||
#define write_8(x) {PORTA.OUTCLR.reg = (DMASK); \
|
||||
PORTA.OUTSET.reg = (((x) & 0x0F) << 6) \
|
||||
| (((x) & 0x30) << 10) \
|
||||
| (((x) & 0xC0)<<14); }
|
||||
#define read_8() (((PORTA.IN.reg >> 6) & 0x0F) \
|
||||
| ((PORTA.IN.reg >> 10) & 0x30) \
|
||||
| ((PORTA.IN.reg >> 14) & 0xC0))
|
||||
#define setWriteDir() { PORTA.DIRSET.reg = DMASK; \
|
||||
PORTA.WRCONFIG.reg = (DMASK & 0xFFFF) | (0<<22) | (1<<28) | (1<<30); \
|
||||
PORTA.WRCONFIG.reg = (DMASK>>16) | (0<<22) | (1<<28) | (1<<30) | (1<<31); \
|
||||
}
|
||||
#define setReadDir() { PORTA.DIRCLR.reg = DMASK; \
|
||||
PORTA.WRCONFIG.reg = (DMASK & 0xFFFF) | (1<<17) | (1<<28) | (1<<30); \
|
||||
PORTA.WRCONFIG.reg = (DMASK>>16) | (1<<17) | (1<<28) | (1<<30) | (1<<31); \
|
||||
}
|
||||
#endif
|
||||
#else
|
||||
#error MCU unselected
|
||||
#endif // MCUs
|
||||
|
||||
#endif //PIN_SHIELD_8_H
|
||||
Reference in New Issue
Block a user