mirror of
https://github.com/YuzuZensai/MCUFRIEND_kbv.git
synced 2026-01-31 14:57:48 +00:00
parse app notes for init tables
This commit is contained in:
54
extras/unused/appnote_ilitek.sed
Normal file
54
extras/unused/appnote_ilitek.sed
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@@ -0,0 +1,54 @@
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#n does not work. use nsed -n
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######################################################################
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# nsed -f pagebreak.sed file.txt | nsed -n -f appnote_ilitek.sed
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# parse Ilitek App Note sequence. e.g.
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# LCD_ILI9486_CMD(0XF2);
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# LCD_ILI9486_INDEX(0x18);
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# Delayms(1); // Delay 1ms
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:Ilitek
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# //Title line
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s/^[1-9].*/\/\/ &/
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# //comment to /* comment */
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s/[/][/]\(.*\)/\/\*\1\*\/ /
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s/_CMD_INDEX/_CMD/
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s/_CMD_PAs/_INDEX/
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s/_ Parameter (/_INDEX(/
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/LCD_ILI9..._CMD(/b good
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/Delayms(/b good
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b print
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{
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:good
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h
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:args
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n
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s/[/][/]\(.*\)/\/\*\1\*\/ /
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s/_CMD_INDEX/_CMD/
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s/_CMD_PAs/_INDEX/
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s/_ Parameter (/_INDEX(/
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# append any data to Hold space
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/LCD_ILI9..._INDEX(/{
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H
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b args
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}
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/^$/b args
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x
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# parse command byte to (0xNN),
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s/LCD_ILI9..._CMD(\([^)]+\)/ (\1)/
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# parse data byte to 0xNN,
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s/\nLCD_ILI9..._INDEX(//g
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# parse delay times
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s/Delayms(\(.+\));/ TFTLCD_DELAY8, \1, /
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s/)\;/,/g
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s/0X/0x/g
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s/,;/,/
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p
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x
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b Ilitek
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}
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:print
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p
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:end
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47
extras/unused/appnote_renesas.sed
Normal file
47
extras/unused/appnote_renesas.sed
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@@ -0,0 +1,47 @@
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#n does not work. use nsed -n
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######################################################################
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# parse Renesas App Note sequence. e.g.
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# {setc, [107], W, 0x000B0}
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# {setc, 0x000D0}
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# {setp, 0x00033}
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# {time, 0040,ms}
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:Renesas
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# //Title line
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s/^[1-9].*/\/\/ &/
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# //comment to /* comment */
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s/[/][/]\(.*\)/\/\*\1\*\/ /
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/{setc,/b good
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/{time,/b good
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b print
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{
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:good
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h
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:args
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n
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s/[/][/]\(.*\)/\/\*\1\*\/ /
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# append any data to Hold space
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/setp/{
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H
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b args
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}
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# /^$/b args
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x
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# verbose format
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s/, \[[0-9]+\], W, 0x/, 0x/g
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# parse command byte to (0xNN),
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s/{setc, 0x000\(..\)}/ (0x\1), /
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# parse data byte to 0xNN,
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# s/\nLCD_ILI9486_INDEX(//g
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s/\n{setp, 0x000\(..\)}/0x\1, /g
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s/\n{setp, 0x00\(...\)}/0x\1, /g
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# parse delay times
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s/{time, 0*\(.*\),ms}/ TFTLCD_DELAY8, \1, /
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s/)\;/,/g
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p
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x
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b Renesas
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}
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:print
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p
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138
extras/unused/ili9341_init.h
Normal file
138
extras/unused/ili9341_init.h
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@@ -0,0 +1,138 @@
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/* 1.2 LG 2.6<EFBFBD> Initial Code*/
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void ILI9341_LG2.6_Initial(void)
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{
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/* VCI=2.8V*/
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/************** Reset LCD Driver ****************//*/
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LCD_nRESET = 1;
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delayms(1); /* Delay 1ms*/
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LCD_nRESET = 0;
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delayms(10); /* Delay 10ms // This delay time is necessary*/
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LCD_nRESET = 1;
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delayms(120); /* Delay 120 ms*/
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/************** Start Initial Sequence **********//*/
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(0xCB),0x39,0x2C,0x00,0x34,0x02,
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(0xCF),0x00,0xC1,0x30,
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(0xE8),0x85,0x00,0x78,
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(0xEA),0x00,0x00,
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(0xED),0x64,0x03,0x12,0x81)
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(0xF7),0x20,
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(0xC0), /*Power control*/ 0x23, /*VRH[5:0]*/
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(0xC1), /*Power control*/ 0x10, /*SAP[2:0];BT[3:0]*/
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(0xC5), /*VCM control*/ 0x2B,0x2B,
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/* (0xC7), /*VCM control2*/ */
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/*LCD_ILI9341_INDEX(0xC0,*/
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(0x36), /* Memory Access Control*/ 0x48,
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(0xB1),0x00,0x1B,
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(0xB6), /* Display Function Control*/ 0x0A,0x02,
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(0xF2), /* 3Gamma Function Disable*/ 0x00,
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(0x26), /*Gamma curve selected*/ 0x01,
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(0xE0), /*Set Gamma*/ 0x0F,0x31,0x2B,0x0C,0x0E,0x08,0x4E,0xF1,0x37,0x07,0x10,0x03,0x0E,0x09,0x00,
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(0xE1), /*Set Gamma*/ 0x00,0x0E,0x14,0x03,0x11,0x07,0x31,0xC1,0x48,0x08,0x0F,0x0C,0x31,0x36,0x0F,
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(0x11), /*Exit Sleep*/
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TFTLCD_DELAY8, 120,
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(0x29), /*Display on*/
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}
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/* 2.2 BOE 2.0<EFBFBD> Initial Code*/
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void ILI9341_BOE2.0_Initial(void)
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{
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/* VCI=2.8V*/
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/************** Reset LCD Driver ****************//*/
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LCD_nRESET = 1;
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delayms(1); /* Delay 1ms*/
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LCD_nRESET = 0;
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delayms(10); /* Delay 10ms // This delay time is necessary*/
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LCD_nRESET = 1;
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delayms(120); /* Delay 120 ms*/
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/************** Start Initial Sequence **********//*/
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(0xCF),0x00,0x99,0x30,
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(0xED),0x64,0x03,0x12,0x81,
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(0xE8),0x85,0x10,0x78,
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(0xCB),0x39,0x2C,0x00,0x34,0x02,
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(0xF7),0x20,
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(0xEA),0x00,0x00,
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(0xC0), /*Power control*/ 0x26, /*VRH[5:0]*/
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(0xC1), /*Power control*/ 0x12, /*SAP[2:0];BT[3:0]*/
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(0xC5), /*VCM control*/ 0x2B,0x2C,
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(0xC7), /*VCM control2*/ 0xC4,
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(0x36), /* Memory Access Control*/ 0x08,
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(0xB1),0x00,0x1B,
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(0xB6), /* Display Function Control*/ 0x0A,0xA2,
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(0xF2), /* 3Gamma Function Disable*/ 0x00,
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(0x26), /*Gamma curve selected*/ 0x01,
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(0xE0), /*Set Gamma*/ 0x0F,0x24,0x21,0x0A,0x0E,0x09,0x51,0xA9,0x44,0x07,0x10,0x03,0x2C,0x0B,0x00,
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(0xE1), /*Set Gamma*/ 0x00,0x1B,0x1E,0x05,0x11,0x06,0x2E,0x56,0x3B,0x08,0x0F,0x0C,0x13,0x14,0x0F,
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(0x11), /*Exit Sleep*/
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TFTLCD_DELAY8, 120,
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(0x29), /*Display on*/
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}
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/* 2.3 BOE 2.4<EFBFBD> Initial Code*/
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void ILI9341_BOE2.4_Initial(void)
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{
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/* VCI=2.8V*/
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/************** Reset LCD Driver ****************//*/
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LCD_nRESET = 1;
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delayms(1); /* Delay 1ms*/
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LCD_nRESET = 0;
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delayms(10); /* Delay 10ms // This delay time is necessary*/
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LCD_nRESET = 1;
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delayms(120); /* Delay 120 ms*/
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/************** Start Initial Sequence **********//*/
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(0xCF),0x00,0x81,0x30,
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(0xED),0x64,0x03,0x12,0x81,
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(0xE8),0x85,0x10,0x78,
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(0xCB),0x39,0x2C,0x00,0x34,0x02,
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(0xF7),0x20,
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(0xEA),0x00,0x00,
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(0xB1),0x00,0x1B,
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(0xB6), /* Display Function Control*/ 0x0A,0xA2,
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(0xC0), /*Power control*/ 0x21, /*VRH[5:0]*/
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(0xC1), /*Power control*/ 0x11, /*SAP[2:0];BT[3:0]*/
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(0xC5), /*VCM control*/ 0x3F,0x3C,
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(0xC7), /*VCM control2*/ 0xb5,
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(0x36), /* Memory Access Control*/ 0x48,
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(0xF2), /* 3Gamma Function Disable*/ 0x00,
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(0x26), /*Gamma curve selected*/ 0x01,
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(0xE0), /*Set Gamma*/ 0x0F,0x26,0x24,0x0B,0x0E,0x09,0x54,0xA8,0x46,0x0C,0x17,0x09,0x0F,0x07,0x00,
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(0xE1), /*Set Gamma*/ 0x00,0x19,0x1B,0x04,0x10,0x07,0x2A,0x47,0x39,0x03,0x06,0x06,0x30,0x38,0x0F,
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(0x11), /*Exit Sleep*/
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TFTLCD_DELAY8, 120,
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(0x29), /*Display on*/
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}
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/* 3.2 Tianma 2.4<EFBFBD> Initial Code*/
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void ILI9341_Tianma2.4_Initial(void)
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{
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/* VCI=2.8V*/
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/************** Reset LCD Driver ****************//*/
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LCD_nRESET = 1;
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delayms(1); /* Delay 1ms*/
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LCD_nRESET = 0;
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delayms(10); /* Delay 10ms // This delay time is necessary*/
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LCD_nRESET = 1;
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delayms(120); /* Delay 120 ms*/
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/************** Start Initial Sequence **********//*/
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(0xCF),0x00,0x81,0x30,
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(0xED),0x64,0x03,0x12,0x81,
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(0xE8),0x85,0x10,0x7A,
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(0xCB),0x39,0x2C,0x00,0x34,0x02,
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(0xF7),0x20,
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(0xEA),0x00,0x00,
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(0xC0), /*Power control*/ 0x21, /*VRH[5:0]*/
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(0xC1), /*Power control*/ 0x11, /*SAP[2:0];BT[3:0]*/
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(0xC5), /*VCM control*/ 0x3F,0x3C,
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(0xC7), /*VCM control2*/ 0xa7,
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(0x36), /* Memory Access Control*/ 0x48,
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(0xB1),0x00,0x1B,
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(0xB6), /* Display Function Control*/ 0x0A,0xA2,
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(0xF2), /* 3Gamma Function Disable*/ 0x00,
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(0x26), /*Gamma curve selected*/ 0x01,
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(0xE0), /*Set Gamma*/ 0x0F,0x23,0x1F,0x0B,0x0E,0x08,0x4B,0xA8,0x3B,0x0A,0x14,0x06,0x10,0x09,0x00,
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(0xE1), /*Set Gamma*/ 0x00,0x1C,0x20,0x04,0x10,0x08,0x34,0x47,0x44,0x05,0x0B,0x09,0x2F,0x36,0x0F,
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(0x11), /*Exit Sleep*/
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TFTLCD_DELAY8, 120,
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(0x29), /*Display on*/
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}
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114
extras/unused/ili9481_init.h
Normal file
114
extras/unused/ili9481_init.h
Normal file
@@ -0,0 +1,114 @@
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/* 1.2 CPT 2.9 Inch Initial Code*/
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Void ILI9481_CPT_Initial_Code(void)
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{
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/* VCI=2.8V*/
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/************** Reset LCD Driver ****************//*/
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LCD_nRESET = 1;
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delayms(1); /* Delay 1ms*/
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LCD_nRESET = 0;
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delayms(10); /* Delay 10ms // This delay time is necessary*/
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LCD_nRESET = 1;
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delayms(100); /* Delay 100 ms*/
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/************** Start Initial Sequence **********//*/
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(0x11),
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TFTLCD_DELAY8, 20,
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(0xD0),0x07,0x42,0x1C,
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(0xD1),0x,0x02,0x0F,
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(0xD2),0x01,0x11,
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(0xC0),0x10,0x35,0x,0x02,0x11,
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(0xC5),
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LCD_ILI9481_INDEX(0x03);
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(0xC8),0x,0x30,0x36,0x45,0x04,0x16,0x37,0x75,0x77,0x54,0x0F,0x,
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(0xE4),0xA0,
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(0xF0),0x01,
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(0xF3),0x02,0x1A)
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;
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(0x36),0x0A,
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(0x2A),0x,0x,0x01,0x3F,
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(0x2B),0x,0x,0x01,0xAD,
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TFTLCD_DELAY8, 120,
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(0x29),
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}
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|
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/* 2.2 PVI 3.5 Inch Initial Code*/
|
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Void ILI9481_CPT_Initial_Code(void)
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{
|
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/* VCI=2.8V*/
|
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/************** Reset LCD Driver ****************//*/
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LCD_nRESET = 1;
|
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delayms(1); /* Delay 1ms*/
|
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LCD_nRESET = 0;
|
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delayms(10); /* Delay 10ms // This delay time is necessary*/
|
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LCD_nRESET = 1;
|
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delayms(100); /* Delay 100 ms*/
|
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/************** Start Initial Sequence **********//*/
|
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(0x11),
|
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TFTLCD_DELAY8, 20,
|
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(0xD0),0x07,0x41,0x1D,
|
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(0xD1),0x,0x2B,0x1F,
|
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(0xD2),0x01,0x11,
|
||||
(0xC0),0x,0x3B,0x,0x02,0x11,
|
||||
|
||||
(0xC5),0x03,
|
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(0xC8),0x,0x14,0x33,0x10,0x,0x16,0x44,0x36,0x77,0x,0x0f,0x,
|
||||
(0xE4),0xA0,
|
||||
(0xF0),0x01,
|
||||
(0xF3),0x40,0x0A,
|
||||
(0x36),0x0A,
|
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TFTLCD_DELAY8, 120,
|
||||
(0x29),
|
||||
|
||||
/* 3.2. AUO 3.17 Inch Initial Code*/
|
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Void ILI9481_AUO_Initial_Code(void)
|
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{
|
||||
/* VCI=2.8V*/
|
||||
/************** Reset LCD Driver ****************//*/
|
||||
LCD_nRESET = 1;
|
||||
delayms(1); /* Delay 1ms*/
|
||||
LCD_nRESET = 0;
|
||||
delayms(10); /* Delay 10ms // This delay time is necessary*/
|
||||
LCD_nRESET = 1;
|
||||
delayms(100); /* Delay 100 ms*/
|
||||
/************** Start Initial Sequence **********//*/
|
||||
(0x11),
|
||||
TFTLCD_DELAY8, 20,
|
||||
(0xD0),0x07,0x40,0x1D,
|
||||
(0xD1),0x,0x18,0x13,
|
||||
(0xD2),0x01,0x11,
|
||||
(0xC0),0x10,0x3B,0x,0x02,0x11,
|
||||
|
||||
(0xC5),0x03,
|
||||
(0xC8),0x,0x44,0x06,0x44,0x0A,0x08,0x17,0x33,0x77,0x44,0x08,0x0c,
|
||||
(0xE4),0xA0,
|
||||
(0xF0),0x01,
|
||||
(0x36),0x0A,
|
||||
TFTLCD_DELAY8, 120,
|
||||
(0x29),
|
||||
|
||||
/* 4.2. CMO 3.5 Inch Initial Code*/
|
||||
(0x01),
|
||||
DelayX1ms(120);
|
||||
(0x11),
|
||||
DelayX1ms(120);
|
||||
/*Power Setting*/
|
||||
(0xD0),0x07,0x41,0x1D,
|
||||
DelayX1ms(20);
|
||||
/*Vcom Setting*/
|
||||
(0xD1),0x00,0x1C,/*18*/ 0x1F,
|
||||
/*Power Setting for normal mode*/
|
||||
(0xD2),0x01,0x11,
|
||||
(0xC0), /*Panel Driving Setting*/ 0x00,0x3B,0x00,0x02,0x11,
|
||||
(0xC6),0x83,
|
||||
|
||||
(0xC8),0x00,0x26,0x21,0x00,0x00,0x1F,0x65,0x23,0x77,0x00,0x0F,0x00,
|
||||
(0xF0),0x01,
|
||||
/* (0xE4),*/
|
||||
/*LCD_ILI9481_INDEX(0xA0,*/
|
||||
(0x36),0x48,/*0x08 _BGR,0x _RGB*/
|
||||
/*Set display on*/
|
||||
(0x29),
|
||||
(0xB4),0x11,
|
||||
(0x2C),
|
||||
|
||||
158
extras/unused/ili9486_init.h
Normal file
158
extras/unused/ili9486_init.h
Normal file
@@ -0,0 +1,158 @@
|
||||
/* 1.2CPT 3.5 Inch Initial Code*/
|
||||
Void ILI9486_CPT_Initial_Code(void)
|
||||
{/* VCI=2.8V*/
|
||||
/************** Reset LCD Driver ****************//*/
|
||||
LCD_nRESET = 1;
|
||||
TFTLCD_DELAY8, 1, /* Delay 1ms*/
|
||||
LCD_nRESET = 0;
|
||||
TFTLCD_DELAY8, 10, /* Delay 10ms // This delay time is necessary*/
|
||||
LCD_nRESET = 1;
|
||||
TFTLCD_DELAY8, 120, /* Delay 120 ms*/
|
||||
/************** Start Initial Sequence **********/**/ */
|
||||
(0xF2),0x18,0xA3,0x12,0x02,0xB2,0x12,0xFF,0x10,0x00,
|
||||
(0xF8),0x21,0x04,
|
||||
(0xF9),0x00,0x08,
|
||||
(0x36),0x08,
|
||||
(0xB4),0x00,
|
||||
(0xC1),0x41,
|
||||
(0xC5),0x00,0x53,
|
||||
(0xE0),0x0F,0x1B,0x18,0x0B,0x0E,0x09,0x47,0x94,0x35,0x0A,0x13,0x05,0x08,0x03,0x00,
|
||||
(0xE1),0x0F,0x3A,0x37,0x0B,0x0C,0x05,0x4A,0x24,0x39,0x07,0x10,0x04,0x27,0x25,0x00,
|
||||
(0x11),
|
||||
TFTLCD_DELAY8, 120,
|
||||
(0x29),
|
||||
}
|
||||
Void ILI9486_EnterSleep_Code(void)
|
||||
{
|
||||
(0x28))
|
||||
TFTLCD_DELAY8, 10,
|
||||
(0x10), /* Set_address_mode*/
|
||||
TFTLCD_DELAY8, 120,
|
||||
}
|
||||
Void ILI9486_ExitSleep_Code(void)
|
||||
{
|
||||
(0x11), /* Set_address_mode*/
|
||||
TFTLCD_DELAY8, 120,
|
||||
(0x29))
|
||||
}
|
||||
|
||||
/* 2.2 HSD 3.5 Inch Initial Code*/
|
||||
Void ILI9486_HSD_Initial_Code(void)
|
||||
{/* VCI=2.8V*/
|
||||
/************** Reset LCD Driver ****************//*/
|
||||
LCD_nRESET = 1;
|
||||
TFTLCD_DELAY8, 1, /* Delay 1ms*/
|
||||
LCD_nRESET = 0;
|
||||
TFTLCD_DELAY8, 10, /* Delay 10ms // This delay time is necessary*/
|
||||
LCD_nRESET = 1;
|
||||
TFTLCD_DELAY8, 120, /* Delay 120 ms*/
|
||||
/************** Start Initial Sequence **********/**/ */
|
||||
(0xF2),0x18,0xA3,0x12,0x02,0xB2,0x12,0xFF,0x10,0x00,
|
||||
(0xF8),0x21,0x04,
|
||||
(0xF9),0x00,0x08,
|
||||
(0x36),0x08,
|
||||
(0xB4),0x00,
|
||||
(0xB6),0x02,0x22,
|
||||
(0xC1),0x41,
|
||||
(0xC5),0x00,0x18,
|
||||
(0xE0),0x0F,0x1F,0x1C,0x0C,0x0F,0x08,0x48,0x98,0x37,0x0A,0x13,0x04,0x11,0x0D,0x00,
|
||||
(0xE1),0x0F,0x32,0x2E,0x0B,0x0D,0x05,0x47,0x75,0x37,0x06,0x10,0x03,0x24,0x20,0x00,
|
||||
(0x11),
|
||||
TFTLCD_DELAY8, 120,
|
||||
(0x29),
|
||||
}
|
||||
Void ILI9486_EnterSleep_Code(void)
|
||||
{
|
||||
(0x28))
|
||||
TFTLCD_DELAY8, 10,
|
||||
(0x10),
|
||||
TFTLCD_DELAY8, 120,
|
||||
}
|
||||
Void ILI9486_ExitSleep_Code(void)
|
||||
{
|
||||
(0x11),
|
||||
TFTLCD_DELAY8, 120,
|
||||
(0x29))
|
||||
}
|
||||
|
||||
/* 3.2 TM 3.2 Inch Initial Code*/
|
||||
Void ILI9486_TM_Initial_Code(void)
|
||||
{/* VCI=2.8V*/
|
||||
/************** Reset LCD Driver ****************//*/
|
||||
LCD_nRESET = 1;
|
||||
TFTLCD_DELAY8, 1, /* Delay 1ms*/
|
||||
LCD_nRESET = 0;
|
||||
TFTLCD_DELAY8, 10, /* Delay 10ms // This delay time is necessary*/
|
||||
LCD_nRESET = 1;
|
||||
TFTLCD_DELAY8, 120, /* Delay 120 ms*/
|
||||
/************** Start Initial Sequence **********/**/ */
|
||||
(0xF2),0x18,0xA3,0x12,0x02,0xB2,0x12,0xFF,0x10,0x00,
|
||||
(0xF8),0x21,0x04,
|
||||
(0xF9),0x00,0x08,
|
||||
(0x36),0x08,
|
||||
(0xB4),0x00,
|
||||
(0xB6),0x02,0x22,
|
||||
(0xC1),0x41,
|
||||
(0xC5),0x00,0x55,
|
||||
(0xE0),0x0F,0x21,0x1C,0x0B,0x0E,0x08,0x49,0x98,0x38,0x09,0x11,0x03,0x14,0x10,0x00,
|
||||
(0xE1),0x0F,0x2F,0x2B,0x0C,0x0E,0x06,0x47,0x76,0x37,0x07,0x11,0x04,0x23,0x1E,0x00,
|
||||
(0x11),
|
||||
TFTLCD_DELAY8, 120,
|
||||
(0x29),
|
||||
}
|
||||
Void ILI9486_EnterSleep_Code(void)
|
||||
{
|
||||
(0x28))
|
||||
TFTLCD_DELAY8, 10,
|
||||
(0x10),
|
||||
TFTLCD_DELAY8, 120,
|
||||
}
|
||||
Void ILI9486_ExitSleep_Code(void)
|
||||
{
|
||||
(0x11),
|
||||
TFTLCD_DELAY8, 120,
|
||||
(0x29))
|
||||
}
|
||||
|
||||
|
||||
/* 4.2 WTK 3.5 Inch Initial Code*/
|
||||
Void ILI9486_WTK_Initial_Code(void)
|
||||
{/* VCI=2.8V*/
|
||||
/************** Reset LCD Driver ****************//*/
|
||||
LCD_nRESET = 1;
|
||||
TFTLCD_DELAY8, 1, /* Delay 1ms*/
|
||||
LCD_nRESET = 0;
|
||||
TFTLCD_DELAY8, 10, /* Delay 10ms // This delay time is necessary*/
|
||||
LCD_nRESET = 1;
|
||||
TFTLCD_DELAY8, 120, /* Delay 120 ms*/
|
||||
/************** Start Initial Sequence **********/**/ */
|
||||
(0xF2),0x18,0xA3,0x12,0x02,0xB2,0x12,0xFF,0x10,0x00,
|
||||
(0xF8),0x21,0x04,
|
||||
(0xF9),0x00,0x08,
|
||||
(0x21),
|
||||
(0x36),0x08,
|
||||
(0xB4),0x00,
|
||||
(0xB6),0x02,0x22,
|
||||
(0xC1),0x41,
|
||||
(0xC5),0x00,0x53,
|
||||
(0xE0),0x0F,0x10,0x08,0x05,0x09,0x05,0x37,0x98,0x26,0x07,0x0F,0x02,0x09,0x07,0x00,
|
||||
(0xE1),0x0F,0x38,0x36,0x0D,0x10,0x08,0x59,0x76,0x48,0x0A,0x16,0x0A,0x37,0x2F,0x00,
|
||||
(0x11),
|
||||
TFTLCD_DELAY8, 120,
|
||||
(0x29),
|
||||
}
|
||||
Void ILI9486_EnterSleep_Code(void)
|
||||
{
|
||||
(0x28))
|
||||
TFTLCD_DELAY8, 10,
|
||||
(0x10),
|
||||
TFTLCD_DELAY8, 120,
|
||||
}
|
||||
Void ILI9486_ExitSleep_Code(void)
|
||||
{
|
||||
(0x11),
|
||||
TFTLCD_DELAY8, 120,
|
||||
(0x29))
|
||||
}
|
||||
|
||||
|
||||
3
extras/unused/pagebreak.sed
Normal file
3
extras/unused/pagebreak.sed
Normal file
@@ -0,0 +1,3 @@
|
||||
# skip the PDF page footers.
|
||||
/^a-.*/,/^Page.*/d
|
||||
/^[0-9]+$/,/^.2010.*/d
|
||||
279
extras/unused/r61526_init.h
Normal file
279
extras/unused/r61526_init.h
Normal file
@@ -0,0 +1,279 @@
|
||||
/* 2. HSD 2.2<EFBFBD> Gamma 2.2 Initial Code(1/2)*/
|
||||
/*R61526 for Hannstar 2.2" Gamma 2.2*/
|
||||
(0xB0), 0x3F, 0x3F,
|
||||
TFTLCD_DELAY8, 5,
|
||||
(0xB3), 0x02, 0x00, 0x00, 0x00, 0x00,
|
||||
(0xB4), 0x00,
|
||||
(0xC0), 0x33, 0x4F, 0x00, 0x10, 0xA2, 0x00, 0x01, 0x00,
|
||||
(0xC1), 0x01, 0x02, 0x1B, 0x08, 0x08,
|
||||
TFTLCD_DELAY8, 25,
|
||||
(0xC3), 0x01, 0x00, 0x1B, 0x08, 0x08,
|
||||
TFTLCD_DELAY8, 25,
|
||||
(0xC4), 0x21, 0x01, 0x200, 0x02, 0x00,
|
||||
/*Gamma setting start*/
|
||||
(0xC8), 0x09, 0x09, 0x0B, 0x0B, 0x0F, 0x00, 0x00, 0x06, 0x15, 0x13, 0x00, 0x03, 0x08, 0x07, 0x0E, 0x0E, 0x1D, 0x0B, 0x11, 0x0C, 0x0C, 0x03,
|
||||
(0xC9), 0x09, 0x09, 0x0B, 0x0B, 0x0F, 0x00, 0x00, 0x06, 0x15, 0x13, 0x00, 0x03, 0x08, 0x07, 0x0E, 0x0E, 0x1D, 0x0B, 0x11, 0x0C, 0x0C, 0x03,
|
||||
|
||||
/* 2. HSD 2.2<EFBFBD> Gamma 2.2 Initial Code(2/2)*/
|
||||
(0xCA), 0x09, 0x09, 0x0B, 0x0B, 0x0F, 0x00, 0x00, 0x06, 0x15, 0x13, 0x00, 0x03, 0x08, 0x07, 0x0E, 0x0E, 0x1D, 0x0B, 0x11, 0x0C, 0x0C, 0x03,
|
||||
/*Gamma setting end*/
|
||||
/*Power setting start*/
|
||||
(0xD0), 0x33, 0x53, 0x85, 0x35, 0x00, 0x00,
|
||||
(0xD1), 0x53, 0x7A, 0x10,
|
||||
(0xD2), 0x03, 0x24,
|
||||
(0xD4), 0x03, 0x24,
|
||||
(0xE2), 0x3F,
|
||||
/*Power setting End*/
|
||||
/*Other setting*/
|
||||
(0x35), 0x00,
|
||||
(0x36), 0x00,
|
||||
(0x3A), 0x66,
|
||||
(0x2A), 0x00, 0x00, 0x00, 0xEF,
|
||||
(0x2B), 0x00, 0x00, 0x01, 0x3F,
|
||||
(0x2C),
|
||||
(0x11),
|
||||
TFTLCD_DELAY8, 30,
|
||||
(0x29),
|
||||
/*End Gamma 2.2 Setting*/
|
||||
|
||||
/* 2. HSD 2.2<EFBFBD> Gamma 2.5 Initial Code(1/2)*/
|
||||
/*R61526 for Hannstar 2.2" Gamma 2.5*/
|
||||
(0xB0), 0x3F, 0x3F,
|
||||
TFTLCD_DELAY8, 5,
|
||||
(0xB3), 0x02, 0x00, 0x00, 0x00, 0x00,
|
||||
(0xB4), 0x00,
|
||||
(0xC0), 0x33, 0x4F, 0x00, 0x10, 0xA2, 0x00, 0x01, 0x00,
|
||||
(0xC1), 0x01, 0x02, 0x1B, 0x08, 0x08,
|
||||
TFTLCD_DELAY8, 25,
|
||||
(0xC3), 0x01, 0x00, 0x1B, 0x08, 0x08,
|
||||
TFTLCD_DELAY8, 25,
|
||||
(0xC4), 0x21, 0x01, 0x300, 0x02, 0x00,
|
||||
/*Gamma setting start*/
|
||||
(0xC8), 0x09, 0x09, 0x0B, 0x10, 0x09, 0x01, 0x03, 0x0A, 0x1F, 0x06, 0x00, 0x03, 0x08, 0x07, 0x0E, 0x14, 0x18, 0x0A, 0x11, 0x0C, 0x0C, 0x03,
|
||||
(0xC9), 0x09, 0x09, 0x0B, 0x10, 0x09, 0x01, 0x03, 0x0A, 0x1F, 0x06, 0x00, 0x03, 0x08, 0x07, 0x0E, 0x14, 0x18, 0x0A, 0x11, 0x0C, 0x0C, 0x03,
|
||||
|
||||
/* 2. HSD 2.2<EFBFBD> Gamma 2.5 Initial Code(2/2)*/
|
||||
(0xCA), 0x09, 0x09, 0x0B, 0x10, 0x09, 0x01, 0x03, 0x0A, 0x1F, 0x06, 0x00, 0x03, 0x08, 0x07, 0x0E, 0x14, 0x18, 0x0A, 0x11, 0x0C, 0x0C, 0x03,
|
||||
/*Gamma setting end*/
|
||||
/*Power setting start*/
|
||||
(0xD0), 0x33, 0x53, 0x85, 0x35, 0x00, 0x00,
|
||||
(0xD1), 0x54, /*VCM 1B~7F*/ 0x7A, /*VDV 25~7F*/ 0x10,
|
||||
(0xD2), 0x03, 0x24,
|
||||
(0xD4), 0x03, 0x24,
|
||||
(0xE2), 0x3F,
|
||||
/*Power setting End*/
|
||||
/*Other setting*/
|
||||
(0x35), 0x00,
|
||||
(0x36), 0x00,
|
||||
(0x3A), 0x66, /*66->18 bit, 55->16bit.*/
|
||||
(0x2A), 0x00, 0x00, 0x00, 0xEF,
|
||||
(0x2B), 0x00, 0x00, 0x01, 0x3F,
|
||||
(0x2C),
|
||||
(0x11),
|
||||
TFTLCD_DELAY8, 30,
|
||||
(0x29),
|
||||
|
||||
(0xB0), 0x3F, 0x3F,
|
||||
(0xFE), 0x00, 0x00, 0x00, 0x21, 0xB4,
|
||||
(0xB3), 0x00, 0x10,
|
||||
(0xE0), 0x00, 0x40,
|
||||
TFTLCD_DELAY8, 5 ,
|
||||
(0xB3), 0x00, 0x00,
|
||||
(0xFE), 0x00, 0x00, 0x00, 0x21, 0x30,
|
||||
(0xB0), 0x3F, 0x3F,
|
||||
(0xB3), 0x02, 0x00, 0x00, 0x00,
|
||||
(0xB4), 0x00,
|
||||
(0xC0), 0x03, 0x4F, 0x00, 0x10, 0xA2, 0x00, 0x01, 0x00,
|
||||
(0xC1), 0x01, 0x02, 0x28, 0x08, 0x08,
|
||||
TFTLCD_DELAY8, 25 ,
|
||||
(0xC3), 0x01, 0x00, 0x28, 0x08, 0x08,
|
||||
TFTLCD_DELAY8, 25 ,
|
||||
(0xC4), 0x11, 0x01, 0x00, 0x00,
|
||||
(0xC8), /*Gamma*/ 0x0C, 0x0C, 0x0D, 0x14, 0x18, 0x0E, 0x09, 0x09, 0x03, 0x05, 0x00, 0x03, 0x08, 0x07, 0x0E, 0x15, 0x12, 0x0A, 0x0E, 0x0A, 0x0A, 0x00,
|
||||
/* 3. LGD 2.6<EFBFBD> Gamma 2.2 Initial Code(1/2)*/
|
||||
|
||||
(0xC9), /*Gamma*/ 0x0C, 0x0C, 0x0D, 0x14, 0x18, 0x0E, 0x09, 0x09, 0x03, 0x05, 0x00, 0x03, 0x08, 0x07, 0x0E, 0x15, 0x12, 0x0A, 0x0E, 0x0A, 0x0A, 0x00,
|
||||
(0xCA), /*Gamma*/ 0x0C, 0x0C, 0x0D, 0x14, 0x18, 0x0E, 0x09, 0x09, 0x03, 0x05, 0x00, 0x03, 0x08, 0x07, 0x0E, 0x15, 0x12, 0x0A, 0x0E, 0x0A, 0x0A, 0x00,
|
||||
(0xD0), 0x63, 0x53, 0x82, 0x3F,
|
||||
(0xD1), 0x6A, 0x64,
|
||||
(0xD2), 0x03, 0x24,
|
||||
(0xD4), 0x03, 0x24,
|
||||
(0xE2), 0x3F,
|
||||
(0x35), 0x00,
|
||||
(0x36), 0x00,
|
||||
(0x3A), 0x55,
|
||||
(0x2A), 0x00, 0x00, 0x00, 0xEF,
|
||||
(0x2B), 0x00, 0x00, 0x01, 0x3F,
|
||||
(0x2C),
|
||||
(0x11),
|
||||
TFTLCD_DELAY8, 40 ,
|
||||
(0x29),
|
||||
(0x2C),
|
||||
/* 3. LGD 2.6<EFBFBD> Gamma 2.2 Initial Code(2/2)*/
|
||||
|
||||
(0xB0), 0x3F, 0x3F,
|
||||
(0xFE), 0x00, 0x00, 0x00, 0x21, 0xB4,
|
||||
(0xB3), 0x00, 0x10,
|
||||
(0xE0), 0x00, 0x40,
|
||||
TFTLCD_DELAY8, 5 ,
|
||||
(0xB3), 0x00, 0x00,
|
||||
(0xFE), 0x00, 0x00, 0x00, 0x21, 0x30,
|
||||
(0xB0), 0x3F, 0x3F,
|
||||
(0xB3), 0x02, 0x00, 0x00, 0x00,
|
||||
(0xB4), 0x00,
|
||||
(0xC0), 0x03, 0x4F, 0x00, 0x10, 0xA2, 0x00, 0x01, 0x00,
|
||||
(0xC1), 0x01, 0x02, 0x28, 0x08, 0x08,
|
||||
TFTLCD_DELAY8, 25 ,
|
||||
(0xC3), 0x01, 0x00, 0x28, 0x08, 0x08,
|
||||
TFTLCD_DELAY8, 25 ,
|
||||
(0xC4), 0x11, 0x01, 0x00, 0x00,
|
||||
(0xC8), /*Gamma*/ 0x09, 0x09, 0x0B, 0x13, 0x16, 0x0C, 0x09, 0x09, 0x03, 0x05, 0x00, 0x03, 0x08, 0x07, 0x0E, 0x15, 0x12, 0x09, 0x0D, 0x0C, 0x0C, 0x03,
|
||||
/* 3. LGD 2.6<EFBFBD> Gamma 2.5 Initial Code(1/2)*/
|
||||
|
||||
(0xC9), /*Gamma*/ 0x09, 0x09, 0x0B, 0x13, 0x16, 0x0C, 0x09, 0x09, 0x03, 0x05, 0x00, 0x03, 0x08, 0x07, 0x0E, 0x15, 0x12, 0x09, 0x0D, 0x0C, 0x0C, 0x03,
|
||||
(0xCA), /*Gamma*/ 0x09, 0x09, 0x0B, 0x13, 0x16, 0x0C, 0x09, 0x09, 0x03, 0x05, 0x00, 0x03, 0x08, 0x07, 0x0E, 0x15, 0x12, 0x09, 0x0D, 0x0C, 0x0C, 0x03,
|
||||
(0xD0), 0x63, 0x53, 0x82, 0x3F,
|
||||
(0xD1), 0x6A, 0x64,
|
||||
(0xD2), 0x03, 0x24,
|
||||
(0xD4), 0x03, 0x24,
|
||||
(0xE2), 0x3F,
|
||||
(0x35), 0x00,
|
||||
(0x36), 0x00,
|
||||
(0x3A), /*16/18 bit*/ 0x55, /*66->18 bit, 55->16bit.*/
|
||||
(0x2A), 0x00, 0x00, 0x00, 0xEF,
|
||||
(0x2B), 0x00, 0x00, 0x01, 0x3F,
|
||||
(0x2C),
|
||||
(0x11),
|
||||
TFTLCD_DELAY8, 40 ,
|
||||
(0x29),
|
||||
(0x2C),
|
||||
/* 3. LGD 2.6<EFBFBD> Gamma 2.5 Initial Code(2/2)*/
|
||||
|
||||
(0xB0), 0x3F, 0x3F,
|
||||
TFTLCD_DELAY8, 5,
|
||||
(0xB3), 0x02, 0x00, 0x00, 0x00, 0x00,
|
||||
(0xB4), 0x00,
|
||||
(0xC0), 0x33, 0x4F, 0x00, 0x10, 0xA2, 0x00, 0x01, 0x00,
|
||||
(0xC1), 0x01, 0x02, 0x24, 0x04, 0x04,
|
||||
TFTLCD_DELAY8, 25,
|
||||
(0xC4), 0x11, 0x01, 0x00, 0x00, 0x00,
|
||||
/*Gamma setting start*/
|
||||
(0xC8), /*Gamma*/ 0x07, 0x09, 0x0A, 0x11, 0x17, 0x0A, 0x08, 0x04, 0x07, 0x03, 0x00, 0x03, 0x07, 0x04, 0x08, 0x0A, 0x17, 0x11, 0x0A, 0x09, 0x07, 0x00,
|
||||
(0xC9), /*Gamma*/ 0x07, 0x09, 0x0A, 0x11, 0x17, 0x0A, 0x08, 0x04, 0x07, 0x03, 0x00, 0x03, 0x07, 0x04, 0x08, 0x0A, 0x17, 0x11, 0x0A, 0x09, 0x07, 0x00,
|
||||
(0xCA), /*Gamma*/ 0x07, 0x09, 0x0A, 0x11, 0x17, 0x0A, 0x08, 0x04, 0x07, 0x03, 0x00, 0x03, 0x07, 0x04, 0x08, 0x0A, 0x17, 0x11, 0x0A, 0x09, 0x07, 0x00,
|
||||
/* 4. TIAMMA 2.4<EFBFBD> Gamma 2.2 Initial Code(1/2)*/
|
||||
|
||||
/*Power setting start*/
|
||||
(0xD0), 0x33, 0x53, 0x85, 0x3A, 0x30, 0x00,
|
||||
(0xD1), 0x5F, /*VCM 1B~7F*/ 0x78, /*VDV 25~7F*/ 0x10,
|
||||
(0xD2), 0x03, 0x24,
|
||||
(0xE2), 0x3F,
|
||||
/*Power setting End*/
|
||||
(0x35), 0x00,
|
||||
(0x36), 0x00,
|
||||
(0x3A), 0x66, /*66->18 bit, 55->16bit.*/
|
||||
(0x2A), 0x00, 0x00, 0x00, 0xEF,
|
||||
(0x2B), 0x00, 0x00, 0x01, 0x3F,
|
||||
(0x2C),
|
||||
(0x11),
|
||||
TFTLCD_DELAY8, 40,
|
||||
(0x29),
|
||||
(0x2C),
|
||||
/* 4. TIAMMA 2.4<EFBFBD> Gamma 2.2 Initial Code(2/2)*/
|
||||
|
||||
(0xB0), 0x3F, 0x3F,
|
||||
TFTLCD_DELAY8, 5,
|
||||
(0xB3), 0x02, 0x00, 0x00, 0x00, 0x00,
|
||||
(0xB4), 0x00,
|
||||
(0xC0), 0x33, 0x4F, 0x00, 0x10, 0xA2, 0x00, 0x01, 0x00,
|
||||
(0xC1), 0x01, 0x02, 0x24, 0x04, 0x04,
|
||||
TFTLCD_DELAY8, 25,
|
||||
(0xC4), 0x11, 0x01, 0x00, 0x00, 0x00,
|
||||
/*Gamma setting start*/
|
||||
(0xC8), /*Gamma*/ 0x07, 0x09, 0x0A, 0x0C, 0x18, 0x0D, 0x05, 0x04, 0x07, 0x03, 0x00, 0x03, 0x07, 0x04, 0x05, 0x0D, 0x18, 0x0C, 0x0A, 0x09, 0x07, 0x00,
|
||||
(0xC9), /*Gamma*/ 0x07, 0x09, 0x0A, 0x0C, 0x18, 0x0D, 0x05, 0x04, 0x07, 0x03, 0x00, 0x03, 0x07, 0x04, 0x05, 0x0D, 0x18, 0x0C, 0x0A, 0x09, 0x07, 0x00,
|
||||
(0xCA), /*Gamma*/ 0x07, 0x09, 0x0A, 0x0C, 0x18, 0x0D, 0x05, 0x04, 0x07, 0x03, 0x00, 0x03, 0x07, 0x04, 0x05, 0x0D, 0x18, 0x0C, 0x0A, 0x09, 0x07, 0x00,
|
||||
/* 4. TIAMMA 2.4<EFBFBD> Gamma 2.5 Initial Code(1/2)*/
|
||||
|
||||
/*Power setting start*/
|
||||
(0xD0), 0x33, 0x53, 0x85, 0x3D, 0x30, 0x00,
|
||||
(0xD1), 0x5F, /*VCM 1B~7F*/ 0x78, /*VDV 25~7F*/ 0x10,
|
||||
(0xD2), 0x03, 0x24,
|
||||
(0xE2), 0x3F,
|
||||
/*Power setting End*/
|
||||
(0x35), 0x00,
|
||||
(0x36), 0x00,
|
||||
(0x3A), 0x66, /*66->18 bit, 55->16bit.*/
|
||||
(0x2A), 0x00, 0x00, 0x00, 0xEF,
|
||||
(0x2B), 0x00, 0x00, 0x01, 0x3F,
|
||||
(0x2C),
|
||||
(0x11),
|
||||
TFTLCD_DELAY8, 40,
|
||||
(0x29),
|
||||
(0x2C),
|
||||
/* 4. TIAMMA 2.4<EFBFBD> Gamma 2.5 Initial Code(2/2)*/
|
||||
|
||||
(0xB0), 0x3F, 0x3F,
|
||||
TFTLCD_DELAY8, 5,
|
||||
(0xB3), 0x02, 0x00, 0x00, 0x00, 0x00,
|
||||
(0xB4), 0x00,
|
||||
(0xC0), 0x33, 0x4F, 0x00, 0x10, 0xA2, 0x00, 0x01, 0x00,
|
||||
(0xC1), 0x01, 0x02, 0x1A, /*86Hz*/ 0x04, 0x04,
|
||||
TFTLCD_DELAY8, 25,
|
||||
(0xC4), 0x11, 0x01, 0x00, 0x00, 0x00,
|
||||
/*Gamma setting start*/
|
||||
(0xC8), /*GAMMA*/ 0x05, /*V0*/ 0x00, /*V1*/ 0x07, /*V4*/ 0x14, /*V8*/ 0x20, /*V20*/ 0x02, /*V43*/ 0x09, /*V55*/ 0x00, /*V59*/ 0x01, /*V62*/ 0x01, /*V63*/ 0x00, 0x01, /*V63*/ 0x01, /*V62*/ 0x00, /*V59*/ 0x09, /*V55*/ 0x02, /*V43*/ 0x20, /*V20*/ 0x14, /*V8*/ 0x07, /*V4*/ 0x00, /*V1*/ 0x05, /*V0*/ 0x00,
|
||||
(0xC9), /*GAMMA*/ 0x05, /*V0*/ 0x00, /*V1*/ 0x07, /*V4*/ 0x14, /*V8*/ 0x20, /*V20*/ 0x02, /*V43*/ 0x09, /*V55*/ 0x00, /*V59*/ 0x01, /*V62*/ 0x01, /*V63*/ 0x00, 0x01, /*V63*/ 0x01, /*V62*/ 0x00, /*V59*/ 0x09, /*V55*/ 0x02, /*V43*/ 0x20, /*V20*/ 0x14, /*V8*/ 0x07, /*V4*/ 0x00, /*V1*/ 0x05, /*V0*/ 0x00,
|
||||
(0xCA), /*GAMMA*/ 0x05, /*V0*/ 0x00, /*V1*/ 0x07, /*V4*/ 0x14, /*V8*/ 0x20, /*V20*/ 0x02, /*V43*/ 0x09, /*V55*/ 0x00, /*V59*/ 0x01, /*V62*/ 0x01, /*V63*/ 0x00, 0x01, /*V63*/ 0x01, /*V62*/ 0x00, /*V59*/ 0x09, /*V55*/ 0x02, /*V43*/ 0x20, /*V20*/ 0x14, /*V8*/ 0x07, /*V4*/ 0x00, /*V1*/ 0x05, /*V0*/ 0x00,
|
||||
/* 5. BOE 2.0<EFBFBD> Gamma 2.2 Initial Code(1/2)*/
|
||||
|
||||
/*Power setting start*/
|
||||
(0xD0), 0x33, 0x53, 0x85, 0x3A, 0x37, 0x00,
|
||||
(0xD1), 0x41, /*VCM 1B~7F*/ 0x78, /*VDV 25~7F*/ 0x10,
|
||||
(0xD2), 0x03, 0x22,
|
||||
(0xE2), 0x3F,
|
||||
/*Power setting End*/
|
||||
(0x35), 0x00,
|
||||
(0x36), 0x00,
|
||||
(0x3A), 0x66, /*66->18 bit, 55->16bit.*/
|
||||
(0x2A), 0x00, 0x00, 0x00, 0xEF,
|
||||
(0x2B), 0x00, 0x00, 0x01, 0x3F,
|
||||
(0x2C),
|
||||
(0x11),
|
||||
TFTLCD_DELAY8, 40,
|
||||
(0x29),
|
||||
(0x2C),
|
||||
/* 5. BOE 2.0<EFBFBD> Gamma 2.2 Initial Code(2/2)*/
|
||||
|
||||
(0xB0), 0x3F, 0x3F,
|
||||
TFTLCD_DELAY8, 5,
|
||||
(0xB3), 0x02, 0x00, 0x00, 0x00, 0x00,
|
||||
(0xB4), 0x00,
|
||||
(0xC0), 0x33, 0x4F, 0x00, 0x10, 0xA2, 0x00, 0x01, 0x00,
|
||||
(0xC1), 0x01, 0x02, 0x1A, /*86Hz*/ 0x04, 0x04,
|
||||
TFTLCD_DELAY8, 25,
|
||||
(0xC4), 0x11, 0x01, 0x00, 0x00, 0x00,
|
||||
/*Gamma setting start*/
|
||||
(0xC8), /*GAMMA*/ 0x05, /*V0*/ 0x00, /*V1*/ 0x05, /*V4*/ 0x11, /*V8*/ 0x31, /*V20*/ 0x01, /*V43*/ 0x0B, /*V55*/ 0x00, /*V59*/ 0x01, /*V62*/ 0x05, /*V63*/ 0x00, 0x05, /*V63*/ 0x01, /*V62*/ 0x00, /*V59*/ 0x0B, /*V55*/ 0x01, /*V43*/ 0x31, /*V20*/ 0x11, /*V8*/ 0x05, /*V4*/ 0x00, /*V1*/ 0x05, /*V0*/ 0x00,
|
||||
(0xC9), /*GAMMA*/ 0x05, /*V0*/ 0x00, /*V1*/ 0x05, /*V4*/ 0x11, /*V8*/ 0x31, /*V20*/ 0x01, /*V43*/ 0x0B, /*V55*/ 0x00, /*V59*/ 0x01, /*V62*/ 0x05, /*V63*/ 0x00, 0x05, /*V63*/ 0x01, /*V62*/ 0x00, /*V59*/ 0x0B, /*V55*/ 0x01, /*V43*/ 0x31, /*V20*/ 0x11, /*V8*/ 0x05, /*V4*/ 0x00, /*V1*/ 0x05, /*V0*/ 0x00,
|
||||
(0xCA), /*GAMMA*/ 0x05, /*V0*/ 0x00, /*V1*/ 0x05, /*V4*/ 0x11, /*V8*/ 0x31, /*V20*/ 0x01, /*V43*/ 0x0B, /*V55*/ 0x00, /*V59*/ 0x01, /*V62*/ 0x05, /*V63*/ 0x00, 0x05, /*V63*/ 0x01, /*V62*/ 0x00, /*V59*/ 0x0B, /*V55*/ 0x01, /*V43*/ 0x31, /*V20*/ 0x11, /*V8*/ 0x05, /*V4*/ 0x00, /*V1*/ 0x05, /*V0*/ 0x00,
|
||||
/* 5. BOE 2.0<EFBFBD> Gamma 2.5 Initial Code(1/2)*/
|
||||
|
||||
/*Power setting start*/
|
||||
(0xD0), 0x33, 0x53, 0x85, 0x3A, 0x37, 0x00,
|
||||
(0xD1), 0x5B, /*VCM 1B~7F*/ 0x78, /*VDV 25~7F*/ 0x10,
|
||||
(0xD2), 0x03, 0x22,
|
||||
(0xE2), 0x3F,
|
||||
/*Power setting End*/
|
||||
(0x35), 0x00,
|
||||
(0x36), 0x00,
|
||||
(0x3A), 0x66, /*66->18 bit, 55->16bit.*/
|
||||
(0x2A), 0x00, 0x00, 0x00, 0xEF,
|
||||
(0x2B), 0x00, 0x00, 0x01, 0x3F,
|
||||
(0x2C),
|
||||
(0x11),
|
||||
TFTLCD_DELAY8, 40,
|
||||
(0x29),
|
||||
(0x2C),
|
||||
/* 5. BOE 2.0<EFBFBD> Gamma 2.5 Initial Code(2/2)*/
|
||||
|
||||
Reference in New Issue
Block a user