diff --git a/utility/pin_shield_1.h b/utility/pin_shield_1.h
index dd496dd..2fe04a7 100644
--- a/utility/pin_shield_1.h
+++ b/utility/pin_shield_1.h
@@ -10,6 +10,17 @@
 #define LPC1768 1768
 #define LPC2103 2103
 #define LPC2148 2148
+
+#define ISTARGET_NUCLEO64 (0 \
+        || defined(TARGET_NUCLEO_F072RB) \
+        || defined(TARGET_NUCLEO_F103RB) \
+        || defined(TARGET_NUCLEO_F401RE) \
+        || defined(TARGET_NUCLEO_F411RE) \
+        || defined(TARGET_NUCLEO_F446RE) \
+        || defined(TARGET_NUCLEO_L433RC_P) \
+        || defined(TARGET_NUCLEO_L476RG) \
+        )
+
 //#warning Using pin_SHIELD_1.h
 
 #if 0
@@ -182,7 +193,7 @@
 #define PIN_INPUT(port, pin) {if (pin > 7) PIN_MODE4((port)->CRH, (pin&7), 0x4); else  PIN_MODE4((port)->CRL, pin, 0x4); }  //input
 
 
-#elif defined(NUCLEO) || defined(TARGET_NUCLEO_F072RB) || defined(TARGET_NUCLEO_F401RE) || defined(TARGET_NUCLEO_F411RE) || defined(TARGET_NUCLEO_F103RB) || defined(TARGET_NUCLEO_L476RG) || defined(TARGET_NUCLEO_F446RE)
+#elif defined(NUCLEO) || ISTARGET_NUCLEO64
 #define PIN_MODE2(reg, pin, mode) reg=(reg&~(0x3<<((pin)<<1)))|(mode<<((pin)<<1))
 #if __MBED__
 #warning MBED knows everything
@@ -194,7 +205,7 @@
   #else
   #include <STM32F1XX.h>
   #endif
-#elif defined(STM32L476xx)
+#elif defined(STM32L476xx) || defined(STM32L433xx)
   #include <STM32L4XX.h>
 #elif defined(STM32F401xE) || defined(STM32F411xE) || defined(STM32F446xx)
   #include <STM32F4XX.h>
diff --git a/utility/pin_shield_8.h b/utility/pin_shield_8.h
index c90e423..2f662f7 100644
--- a/utility/pin_shield_8.h
+++ b/utility/pin_shield_8.h
@@ -11,6 +11,17 @@
 #define LPC1768 1768
 #define LPC2103 2103
 #define LPC2148 2148
+
+#define ISTARGET_NUCLEO64 (0 \
+        || defined(TARGET_NUCLEO_F072RB) \
+        || defined(TARGET_NUCLEO_F103RB) \
+        || defined(TARGET_NUCLEO_F401RE) \
+        || defined(TARGET_NUCLEO_F411RE) \
+        || defined(TARGET_NUCLEO_F446RE) \
+        || defined(TARGET_NUCLEO_L433RC_P) \
+        || defined(TARGET_NUCLEO_L476RG) \
+        )
+
 //#warning Using pin_SHIELD_8.h
 
 #if 0
@@ -56,7 +67,7 @@
 #define GP_OUT(port, reg, mask)           GROUP_MODE(port, reg, mask, 0x33333333)
 #define GP_INP(port, reg, mask)           GROUP_MODE(port, reg, mask, 0x44444444)
 
-	// configure macros for the data pins
+    // configure macros for the data pins
 #define write_8(d) { \
         GPIOA->REGS(BSRR) = 0x0703 << 16; \
         GPIOB->REGS(BSRR) = 0x00E0 << 16; \
@@ -83,7 +94,7 @@
 #define setWriteDir() {GP_OUT(GPIOA, CRH, 0xFFF); GP_OUT(GPIOA, CRL, 0xFF); GP_OUT(GPIOB, CRL, 0xFFF00000); }
 #define setReadDir()  {GP_INP(GPIOA, CRH, 0xFFF); GP_INP(GPIOA, CRL, 0xFF); GP_INP(GPIOB, CRL, 0xFFF00000); }
 
-#elif defined(NUCLEO) || defined(TARGET_NUCLEO_F072RB) || defined(TARGET_NUCLEO_F401RE) || defined(TARGET_NUCLEO_F411RE) || defined(TARGET_NUCLEO_F103RB) || defined(TARGET_NUCLEO_L476RG) || defined(TARGET_NUCLEO_F446RE)
+#elif defined(NUCLEO) || ISTARGET_NUCLEO64
 #if __MBED__
 #warning MBED knows everything
 #elif defined(STM32F072xB)
@@ -94,7 +105,7 @@
   #else
   #include <STM32F1XX.h>
   #endif
-#elif defined(STM32L476xx)
+#elif defined(STM32L476xx) || defined(STM32L433xx)
   #include <STM32L4XX.h>
 #elif defined(STM32F401xE) || defined(STM32F411xE) || defined(STM32F446xx)
   #include <STM32F4XX.h>