diff --git a/utility/mcufriend_shield.h b/utility/mcufriend_shield.h
index 06e5154..695dc24 100644
--- a/utility/mcufriend_shield.h
+++ b/utility/mcufriend_shield.h
@@ -341,10 +341,12 @@ void write_8(uint8_t x)
 // ST Core:   ARDUINO_ARCH_STM32
 // MapleCore: __STM32F1__
 #elif defined(__STM32F1__) || defined(ARDUINO_ARCH_STM32)   //MapleCore or ST Core
-#define IS_NUCLEO ( defined(ARDUINO_STM_NUCLEO_F103RB) || defined(ARDUINO_NUCLEO_F103RB) \
-                   || defined(ARDUINO_NUCLEO_L476RG) \
+#define IS_NUCLEO64 ( defined(ARDUINO_STM_NUCLEO_F103RB) \
+                   || defined(ARDUINO_NUCLEO_F030R8) || defined(ARDUINO_NUCLEO_F091RC) \
+                   || defined(ARDUINO_NUCLEO_F103RB) || defined(ARDUINO_NUCLEO_F303RE) \
                    || defined(ARDUINO_NUCLEO_F401RE) || defined(ARDUINO_NUCLEO_F411RE) \
-				  )
+                   || defined(ARDUINO_NUCLEO_L053R8) || defined(ARDUINO_NUCLEO_L476RG) \
+                    )
 // F1xx, F4xx, L4xx have different registers and styles.  General Macros
 #if defined(__STM32F1__)   //weird Maple Core
 #define REGS(x) regs->x
@@ -379,18 +381,42 @@ void write_8(uint8_t x)
     }
 
 // should be easy to add F030, F091, F303, L053, ...
-#elif defined(STM32L476xx)
-#define WRITE_DELAY { WR_ACTIVE; WR_ACTIVE; }
-#define READ_DELAY  { RD_ACTIVE; RD_ACTIVE; RD_ACTIVE; RD_ACTIVE; RD_ACTIVE; RD_ACTIVE; }
-#define GPIO_INIT()   { RCC->AHB2ENR |= RCC_AHB2ENR_GPIOAEN | RCC_AHB2ENR_GPIOBEN | RCC_AHB2ENR_GPIOCEN; }
+#elif defined(STM32F030x8)
+#define WRITE_DELAY { }
+#define READ_DELAY  { RD_ACTIVE; }
+#define GPIO_INIT()   { RCC->AHBENR |= RCC_AHBENR_GPIOAEN | RCC_AHBENR_GPIOBEN | RCC_AHBENR_GPIOCEN; }
 #define PIN_OUTPUT(port, pin) PIN_MODE2((port)->MODER, pin, 0x1)
 
+#elif defined(STM32F091xC)
+#define WRITE_DELAY { }
+#define READ_DELAY  { RD_ACTIVE; }
+#define GPIO_INIT()   { RCC->AHBENR |= RCC_AHBENR_GPIOAEN | RCC_AHBENR_GPIOBEN | RCC_AHBENR_GPIOCEN; }
+#define PIN_OUTPUT(port, pin) PIN_MODE2((port)->MODER, pin, 0x1)
+
+#elif defined(STM32F303xE)
+#define WRITE_DELAY { }
+#define READ_DELAY  { RD_ACTIVE; }
+#define GPIO_INIT()   { RCC->AHBENR |= RCC_AHBENR_GPIOAEN | RCC_AHBENR_GPIOBEN | RCC_AHBENR_GPIOCEN; \
+                      /* AFIO->MAPR |= AFIO_MAPR_SWJ_CFG_1; */ }
+
 #elif defined(STM32F401xE) || defined(STM32F411xE)
 #define WRITE_DELAY { WR_ACTIVE; WR_ACTIVE; }
 #define READ_DELAY  { RD_ACTIVE; RD_ACTIVE; RD_ACTIVE; RD_ACTIVE; RD_ACTIVE; RD_ACTIVE; }
 #define GPIO_INIT()   { RCC->AHB1ENR |= RCC_AHB1ENR_GPIOAEN | RCC_AHB1ENR_GPIOBEN | RCC_AHB1ENR_GPIOCEN; }
 #define PIN_OUTPUT(port, pin) PIN_MODE2((port)->MODER, pin, 0x1)
 
+#elif defined(STM32L053xx)
+#define WRITE_DELAY { }
+#define READ_DELAY  { RD_ACTIVE; }
+#define GPIO_INIT()   { RCC->IOPENR |= RCC_IOPENR_GPIOAEN | RCC_IOPENR_GPIOBEN | RCC_IOPENR_GPIOCEN; }
+#define PIN_OUTPUT(port, pin) PIN_MODE2((port)->MODER, pin, 0x1)
+
+#elif defined(STM32L476xx)
+#define WRITE_DELAY { WR_ACTIVE; WR_ACTIVE; }
+#define READ_DELAY  { RD_ACTIVE; RD_ACTIVE; RD_ACTIVE; RD_ACTIVE; RD_ACTIVE; RD_ACTIVE; }
+#define GPIO_INIT()   { RCC->AHB2ENR |= RCC_AHB2ENR_GPIOAEN | RCC_AHB2ENR_GPIOBEN | RCC_AHB2ENR_GPIOCEN; }
+#define PIN_OUTPUT(port, pin) PIN_MODE2((port)->MODER, pin, 0x1)
+
 #else
 #error unsupported STM32
 #endif
@@ -417,7 +443,7 @@ void write_8(uint8_t x)
 #define setWriteDir() {GP_OUT(GPIOA, CRL, 0xFFFFFFFF); }
 #define setReadDir()  {GP_INP(GPIOA, CRL, 0xFFFFFFFF); }
 
-#elif IS_NUCLEO // Uno Shield on NUCLEO
+#elif IS_NUCLEO64 // Uno Shield on NUCLEO
 #warning Uno Shield on NUCLEO
 #define RD_PORT GPIOA
 #define RD_PIN  0